A progressive set of 100 VHDL projects, from logic gates to a simple CPU and SoC.
☆72Sep 15, 2025Updated 6 months ago
Alternatives and similar repositories for VHDL-100-Projects
Users that are interested in VHDL-100-Projects are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Tests to evaluate the support of VHDL 2008 and VHDL 2019 features☆32Jan 30, 2025Updated last year
- A tool for modeling FSMs by VHDL or Verilog☆12Updated this week
- ☆25Updated this week
- Misc. FPGA Projects☆15May 27, 2025Updated 9 months ago
- VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and …☆24Oct 29, 2025Updated 4 months ago
- NordVPN Special Discount Offer • AdSave on top-rated NordVPN 1 or 2-year plans with secure browsing, privacy protection, and support for for all major platforms.
- Parametrized RTL benchmark suite☆25Feb 6, 2026Updated last month
- Learn, share and collaborate on ASIC design using open tools and technologies☆14Dec 27, 2020Updated 5 years ago
- Docker Development Environment for SpinalHDL☆20Aug 8, 2024Updated last year
- shdl6800: A 6800 processor written in SpinalHDL☆25Jan 12, 2020Updated 6 years ago
- A repository for a random collection of stuff pertaining to reverse engineering the Pano Logic G2 "zero" client☆35Dec 12, 2018Updated 7 years ago
- FPGA Hardware Simulation Framework☆17Oct 13, 2025Updated 5 months ago
- A minimal complexity fpga board☆13Jun 1, 2022Updated 3 years ago
- A basic documentation generator for Verilog, similar to Doxygen.☆13Aug 5, 2016Updated 9 years ago
- Project 1.1 Simulate a Skywater 130nm standard cell using ngspice☆14Jul 18, 2025Updated 8 months ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Program to scan for malicious FPGA designs.☆17Mar 20, 2021Updated 5 years ago
- D3.js and ELK based schematic visualizer☆116Feb 27, 2024Updated 2 years ago
- Sphinx domain to allow integration of Verilog / SystemVerilog documentation into Sphinx.☆26Mar 1, 2021Updated 5 years ago
- FM-7/77AV/40 version of Common Source Project, aim to GPL.☆27Updated this week
- Fabric generator and CAD tools graphical frontend☆18Aug 5, 2025Updated 7 months ago
- ☆11Jul 23, 2022Updated 3 years ago
- Docker image with Xilinx ISE 14.7☆36Feb 1, 2021Updated 5 years ago
- An easy-to-use, silicon-proven (e)FPGA generator with an integrated CAD toolchain 🏗️☆223Updated this week
- Projects published on controlpaths.com and hackster.io☆42Jul 18, 2022Updated 3 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- This is a stand-alone Verilog IDE derived from a QtCreator 3.6.1 subset featuring the VerilogCreator plugin☆21Aug 8, 2022Updated 3 years ago
- A Reddit bot that transcribes tweets from comments and submissions links, mirrors their images and replies back with a formatted Markdown…☆17Apr 4, 2022Updated 3 years ago
- Scrapes bitinfocharts data into csv files☆19Dec 10, 2021Updated 4 years ago
- VUnit test explorer for VSCode☆12Dec 30, 2022Updated 3 years ago
- ☆19Aug 30, 2020Updated 5 years ago
- OSVVM project simulation scripts. Scripts are tedious. These scripts simplify the steps to compile your project for simulation☆14Mar 16, 2026Updated last week
- 3-wide superscalar, out-of-order RISC-V processor (RV32IM subset) in System Verilog, demonstrating key Instruction-Level Parallelism☆27Aug 15, 2025Updated 7 months ago
- Prepared CentOS6 in Docker to run Xilinx ISE 14.7☆40Aug 16, 2022Updated 3 years ago
- ☆20May 5, 2020Updated 5 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- A port of the gcc compiler suite to the Motorola 6809 processor☆13May 17, 2017Updated 8 years ago
- Flappy Bird core for MiSTer, MiST, DeMiSTify, Pocket, Xilinx, GoWin, ...☆21Aug 4, 2023Updated 2 years ago
- Port of MIT's xv6 OS to 32 bit RISC V☆12Feb 12, 2023Updated 3 years ago
- ☆10Aug 25, 2022Updated 3 years ago
- QuSoC demo projects and template☆24Mar 4, 2026Updated 3 weeks ago
- ROM images under development for RC2014 8085 and other projects☆14Jun 21, 2025Updated 9 months ago
- 6800 and 6809 Retro Hardware☆14Dec 28, 2025Updated 2 months ago