twj42 / PanoLogicG2_ReverseEngineering
A repository for a random collection of stuff pertaining to reverse engineering the Pano Logic G2 "zero" client
☆34Updated 6 years ago
Alternatives and similar repositories for PanoLogicG2_ReverseEngineering
Users that are interested in PanoLogicG2_ReverseEngineering are comparing it to the libraries listed below
Sorting:
- Flashing Pano Logic thin clients without a programmer☆40Updated 2 years ago
- Prebuilt images for Linux for the Pano Logic G2☆13Updated last year
- Constraints file and Verilog demo code for the Pano Logic Zero Client G2☆17Updated 6 years ago
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆35Updated last year
- Test of a RP2040 PMOD attached to a LiteX SoC.☆25Updated 2 years ago
- Port of Brian Bennet's NES Emulator for the second generation Panologic thin client☆12Updated 3 years ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆37Updated 2 years ago
- VGA-compatible text mode functionality☆17Updated 5 years ago
- DVI PMOD adapter (HDMI connector)☆28Updated 4 years ago
- understanding the tinyfpga bootloader☆24Updated 7 years ago
- ice40 USB Analyzer☆58Updated 4 years ago
- Low-area DVI experiment for iCE40 UP5k and HX1k FPGAs☆31Updated 3 years ago
- Retro Z80 computer for the Pano Logic Thin Client☆46Updated 3 years ago
- shdl6800: A 6800 processor written in SpinalHDL☆26Updated 5 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆12Updated 2 years ago
- soft processor core compatible with i586 instruction set(Intel Pentium) developped on Nexys4 board boots linux kernel with a ramdisk cont…☆32Updated 8 years ago
- Information on cores available on the Ulx3s ECP5 FPGA board☆14Updated 5 years ago
- Quickstart binaries for flashing ULX3S to factory-default state☆25Updated 3 years ago
- Retro computing on the Ulx3s ECP5 FPGA board☆24Updated 3 years ago
- PanoLogic Zero Client G1 reverse engineering info☆74Updated last year
- ☆21Updated 3 years ago
- An FPGA/PCI Device Reference Platform☆28Updated 4 years ago
- nMigen examples for the ULX3S board☆16Updated 4 years ago
- A simple script to build open-source FPGA tools.☆15Updated 5 years ago
- Network based loader and flasher for Pano G2 devices☆15Updated last year
- FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC☆57Updated 2 years ago
- Mega/Xmega soft core RTL design.☆11Updated 5 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆60Updated 6 years ago
- USB Full-Speed core written in migen/LiteX☆42Updated 6 years ago
- Smol 2-stage RISC-V processor in nMigen☆26Updated 4 years ago