☆52Dec 3, 2025Updated 9 months ago
Alternatives and similar repositories for Netlistify
Users that are interested in Netlistify are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆125Aug 9, 2026Updated 3 weeks ago
- ☆18Apr 27, 2026Updated 4 months ago
- Multimodal-LLM Based AI Agent for Schematic Generation of Analog Circuit☆37Oct 20, 2025Updated 10 months ago
- The implementation of FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design (NeurIPS 2025)☆50Nov 19, 2025Updated 9 months ago
- ☆21Aug 26, 2025Updated last year
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- A robust analog circuit parameter optimization framework with sampling-efficient reinforcement learning☆24Dec 9, 2024Updated last year
- LLM-based transistor sizing for AMS circuits☆36Apr 23, 2026Updated 4 months ago
- A versatile generative model capable of designing topologies for wide range of analog circuits.☆113Apr 26, 2025Updated last year
- Characterizing and Optimizing EDA Flows for the Cloud (DATE'2021 and TCAD)☆12Nov 2, 2021Updated 4 years ago
- Open Circuit Benchmark OCB and source code for CktGNN (https://openreview.net/forum?id=NE2911Kq1sp).☆95Sep 11, 2023Updated 2 years ago
- ChatEDA: A Large Language Model Powered Autonomous Agent for EDA (TCAD'24, NAACL'25)☆58May 21, 2025Updated last year
- Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".☆70Apr 18, 2026Updated 4 months ago
- This place provide different SRAM cells netlist to be simulated with HSpice tool in sub-20nm FinFET technologies.☆12Dec 31, 2020Updated 5 years ago
- This is the Github Repo for the paper: MCP4EDA: LLM-Powered Model Context Protocol RTL-to-GDSII Automation with Backend Aware Synthesis O…☆108Jul 29, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Deep Q learning algorithm written on PyTorch for solving 2D robot arm reacher☆12Feb 19, 2020Updated 6 years ago
- Agent skills for veriloga☆32Jul 21, 2026Updated last month
- final project that propose a way to convert hand-drawn circuit to computer schematic☆92Jun 27, 2018Updated 8 years ago
- A database for ferrite core materials to store datasheet information and self-measured data.☆17Aug 27, 2026Updated last week
- LLM Agent for Hardware Description Language☆23Jun 7, 2025Updated last year
- awesome-Analog-IC-Design-Automation☆58Apr 19, 2023Updated 3 years ago
- This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…☆95Jun 12, 2023Updated 3 years ago
- ☆15Feb 5, 2025Updated last year
- just checking☆25Jun 29, 2022Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- The biologically plausible self backpropagation on SNNs and ANNs☆13Aug 27, 2021Updated 5 years ago
- NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph (DAC'25)☆25May 20, 2026Updated 3 months ago
- Official implementation of NeurIPS'23 paper "Macro Placement by Wire-Mask-Guided Black-Box Optimization"☆33May 23, 2025Updated last year
- The code for tuning Spiking Neural Network based on Biologically-plausible Reward Propagation☆11Nov 23, 2020Updated 5 years ago
- This project attempts to classify the entries in the Microsoft Malware Classification Challenge dataset using random forests.☆11Dec 22, 2016Updated 9 years ago
- 纪录片电影 Revolution OS (《操作系统革命》)中文字幕修订计划☆15Jan 17, 2021Updated 5 years ago
- iFCN: Automated Design Platform for Molecular FCN Circuits☆15Updated this week
- ☆10Dec 4, 2018Updated 7 years ago
- This project shows how to model a 10-bit pipeline ADC and a 10-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, …☆40Apr 7, 2019Updated 7 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- hanLP-python server api☆12Apr 25, 2017Updated 9 years ago
- LLM Evaluation Benchmark on Hardware Formal Verification☆44Apr 3, 2025Updated last year
- Userspace USB driver for CAN to USB adapters - based on the Kvaser canlib API☆19Feb 22, 2020Updated 6 years ago
- Solve one design problem each day for a month☆56Feb 3, 2023Updated 3 years ago
- Design of 6T, 8T and 10T SRAM Cells with Static Noise Margin Analysis☆17Dec 9, 2022Updated 3 years ago
- 基于FPGA的二维卷积识别任务☆26Apr 29, 2023Updated 3 years ago
- Implementation of Spiking Neural Networks (SNNs) using SpykeTorch, featuring STDP and R-STDP training methods for efficient neural comput…☆16Nov 12, 2024Updated last year