Alternatives and similar repositories for GANA_circuit_data

Users that are interested in GANA_circuit_data are comparing it to the libraries listed below

• baloneymath / AncstrGNN
  ☆16Updated 4 years ago
• DfX-NYUAD / GNN4IC
  Must-read papers on Graph Neural Networks (GNNs) for Integrated Circuits (ICs) design, security and reliability.
  ☆54Updated 2 months ago
• PKU-IDEA / SymDetect
  Layout Symmetry Annotation for Analog Circuits with GraphNeural Networks
  ☆14Updated 2 years ago
• CODA-Team / AncstrGNN_benchmark
  Analog IC symmetry extraction benchmark of AncstrGNN
  ☆10Updated 9 months ago
• daeyeon22 / artificial_netlist_generator
  Artificial Netlist Generator
  ☆39Updated last year
• TimingPredict / TimingPredict
  Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)
  ☆74Updated 9 months ago
• lilasrahis / GNN4REL
  Graph Neural Networks for Predicting Circuit Reliability Degradation. TCAD 2022
  ☆20Updated 2 years ago
• ycchen218 / EDA-Congestion-Prediction
  This is a deep-learning based model for Electronic Design Automation(EDA), predicting the congestion location.
  ☆22Updated 9 months ago
• magical-eda / UT-AnLay
  Analog Placement Quality Prediction
  ☆21Updated 2 years ago
• DfX-NYUAD / GNN-RE
  GNN-RE datasets for circuit recognition
  ☆45Updated 2 years ago
• CMACH508 / DeepTH
  ☆14Updated last year
• NYU-MLDA / OpenABC
  OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…
  ☆128Updated 7 months ago
• zshi0616 / DeepGate2
  ☆28Updated last year
• AMS-Net / ams-net.github.io
  ☆29Updated 11 months ago
• TILOS-AI-Institute / HypergraphPartitioning
  Hypergraph Partitioning: benchmarks, evaluators, best known solutions and codes
  ☆68Updated this week
• geziangfinn / easyPlace
  Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS
  ☆39Updated 7 months ago
• LQY404 / EDA-info
  the awesome work, project and lab of EDA (Electronic Design Automation). continue update...
  ☆23Updated 9 months ago
• MIRALab-USTC / ChiPBench
  ChiPBench:Benchmarking End-to-End Performance of AI-based Chip Placement Algorithms
  ☆39Updated last month
• kouroshHakha / bagnet_ngspice
  ☆16Updated 3 years ago
• PKUterran / NetlistGNN
  ☆43Updated 2 years ago
• CODA-Team / AnalogGym
  ☆44Updated this week
• lydiawunan / LOSTIN
  LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models
  ☆22Updated 3 years ago
• krzhu / IdeaPlaceEx
  Analog and mixed-signal automatic placer
  ☆11Updated 2 years ago
• lydiawunan / HLS-Perf-Prediction-with-GNNs
  High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing
  ☆51Updated last year
• cure-lab / DeepGate
  This is an official implementation for "DeepGate: Learning Neural Representations of Logic Gates".
  ☆21Updated last year
• lamda-bbo / Efficient-TDP
  Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".
  ☆44Updated 3 weeks ago
• parkerluxu / awesome-Analog-IC-Design-Automation
  awesome-Analog-IC-Design-Automation
  ☆37Updated 2 years ago
• sorarain / RoutePlacer
  ☆13Updated 11 months ago
• cure-lab / DeepGate2
  ☆15Updated 2 years ago
• PKU-IDEA / MacroRank
  Official implementation of MacroRank: Ranking Macro Placement Solutions Leveraging Translation Equivariancy (ASP-DAC 2023)
  ☆17Updated 2 years ago