wanganran / XNORNet4FPGA
XNOR-Net inference on low-power IGLOO FPGA using Chisel
☆9Updated 7 years ago
Alternatives and similar repositories for XNORNet4FPGA:
Users that are interested in XNORNet4FPGA are comparing it to the libraries listed below
- ☆10Updated 8 years ago
- ☆39Updated 7 years ago
- Binary Neural Network on IceStick FPGA.☆52Updated 6 years ago
- ☆119Updated 7 years ago
- Example code and instructions on getting Tensorflow Lite running on a Xilinx Zynq☆49Updated 7 years ago
- HLS Custom-Precision Floating-Point Library☆13Updated 7 years ago
- ☆14Updated 5 years ago
- CaffePresso: An Optimized Library for Deep Learning on Embedded Accelerator-based platforms☆88Updated 6 months ago
- This repo is for ECE44x (Fall2015-Spring2016)☆20Updated 7 years ago
- ☆45Updated 5 years ago
- verilog CNN generator for FPGA☆34Updated 4 years ago
- ☆35Updated 8 years ago
- ☆62Updated 7 years ago
- Caffe implementation of accurate low-precision neural networks☆117Updated 6 years ago
- OpenCL Labs for PAPAA Summer School 2016 Edition☆46Updated 7 years ago
- Aiming at an AI Chip based on RISC-V and NVDLA.☆20Updated 7 years ago
- A script to convert floating-point CNN models into generalized low-precision ShiftCNN representation☆56Updated 7 years ago
- Design contest for DAC 2018☆17Updated 7 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆89Updated 6 years ago
- HLS branch of Halide☆76Updated 6 years ago
- This is a collection of works on neural networks and neural accelerators.☆40Updated 6 years ago
- XNOR-Net, CUDNN5 supported version of XNOR-Net-caffe: https://github.com/loswensiana/BWN-XNOR-caffe☆30Updated 7 years ago
- ☆26Updated 8 years ago
- Embedded hardware accelerator of multilayer perceptrons for lightweight machine learning☆16Updated 8 years ago
- Implementation of Ternary Weight Networks In Caffe☆63Updated 8 years ago
- I'm going to use the Winograd’s minimal filtering algorithms to introduce a new class of fast algorithms for convolutional neural networks…☆12Updated 7 years ago
- code submitted to DAC2018(http://www.cse.cuhk.edu.hk/~byu/2018-DAC-HDC/index.html)☆14Updated 6 years ago
- Template for projects using the Hwacha data-parallel accelerator☆34Updated 4 years ago
- Keras implementations of BinaryNet and XNORNet☆55Updated 7 years ago
- Caffe to VHDL☆67Updated 4 years ago