Alternatives and similar repositories for ptlsim

Users that are interested in ptlsim are comparing it to the libraries listed below

• avadhpatel / marss
  PTLsim and QEMU based Computer Architecture Research Simulator
  ☆130Updated 3 years ago
• ucb-bar / ccbench
  Memory System Microbenchmarks
  ☆65Updated 2 years ago
• aakahlow / gem5Valid_Haswell
  ☆21Updated 5 years ago
• afborchert / pointer-chasing
  Utilities to measure read access times of caches, memory, and hardware prefetches for simple and fused operations
  ☆85Updated 2 years ago
• aliireza / slice-aware
  Slice-aware Memory Management - Exploiting NUCA Characteristic of LLC in Intel Processors
  ☆41Updated 6 years ago
• travisdowns / robsize
  ROB size testing utility
  ☆158Updated 4 years ago
• hadibrais / archsim
  A survey on architectural simulators focused on CPU caches.
  ☆16Updated 5 years ago
• hanhwi / SimPoint
  ☆17Updated 3 years ago
• darchr / gem5art
  Artifact, reproducibility, and testing utilites for gem5
  ☆23Updated 4 years ago
• melver / mc2lib
  Memory consistency model checking and test generation library.
  ☆16Updated 9 years ago
• heechul / palloc
  DRAM Bank-Aware Kernel Memory Allocator
  ☆45Updated last week
• masc-ucsc / esesc
  ESESC: A Fast Multicore Simulator
  ☆140Updated 2 months ago
• ARM-software / synchronization-benchmarks
  Collection of synchronization micro-benchmarks and traces from infrastructure applications
  ☆49Updated 5 months ago
• Veedrac / microarchitecturometer
  Measures microarchitectural details such as ROB size. Like https://github.com/travisdowns/robsize but without runtime code generation, wh…
  ☆132Updated 4 years ago
• jdmccalpin / SKX-SF-Conflicts
  Repeated access to L2-containable loops to look for snoop filter conflicts on Intel Skylake Xeon processors.
  ☆29Updated 7 years ago
• efeslab / lapidary
  Creating beautiful gem5 simulations
  ☆49Updated 4 years ago
• PrincetonUniversity / primesim
  A parallel and distributed simulator for thousand-core chips
  ☆27Updated 7 years ago
• boegel / MICA
  a Pin tool for collecting microarchitecture-independent workload characteristics
  ☆62Updated last year
• comparch-security / cache-model
  A behavioural cache model for analysing the cache behaviour under side-channel attack.
  ☆27Updated 6 months ago
• daniellustig / riscv-memory-model
  A formalization of the RVWMO (RISC-V) memory model
  ☆35Updated 3 years ago
• umd-memsys / gem5
  This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews shoul…
  ☆13Updated 5 years ago
• riscv-admin / riscv-ovpsim
  ☆61Updated 4 years ago
• gururaj-s / mirage
  MIRAGE (USENIX Security 2021)
  ☆14Updated 2 years ago
• gururaj-s / cleanupspec
  CleanupSpec (MICRO-2019)
  ☆16Updated 5 years ago
• esl-epfl / gem5-X
  The gem5-X open source framework (based on the gem5 simulator)
  ☆42Updated 2 years ago
• mattsinc / heterosync
  HeteroSync is a benchmark suite for performing fine-grained synchronization on tightly coupled GPUs
  ☆30Updated last year
• gthparch / macsim
  A heterogeneous architecture timing model simulator.
  ☆173Updated 3 months ago
• ccelio / Speckle
  A wrapper for the SPEC CPU2006 benchmark suite.
  ☆91Updated 4 years ago
• CMU-SAFARI / BEER
  BEER determines an ECC code's parity-check matrix based on the uncorrectable errors it can cause. BEER targets Hamming codes that are use…
  ☆19Updated 5 years ago
• efeslab / moesi-prime
  ☆15Updated 3 years ago