“Build It. Test It. Publish It.” This year’s program emphasizes not only open-source design and tapeout, but also reproducible results, measurement, and dissemination through a dedicated workshop and publication opportunities. Build from your repo, test your chip, and publish the results!
☆93Jul 29, 2026Updated this week
Alternatives and similar repositories for sscs-chipathon-2026
Users that are interested in sscs-chipathon-2026 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Blocks & Bots: An Open Chip Playground augmented with LLMs. Please check: https://sscs.ieee.org/technical-committees/tc-ose/sscs-pico-des…☆84Dec 16, 2025Updated 7 months ago
- Documentation for the 2025 IEEE SSCS Chipathon Track on MOSbius☆19Sep 6, 2025Updated 10 months ago
- ☆37May 29, 2026Updated 2 months ago
- ☆151Jun 16, 2026Updated last month
- This repository contains a detailed description of how to generate parameterized cells using GDSFactory-based layout automation tool GLay…☆13Oct 14, 2024Updated last year
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- SPARX: An Open-Source, Automated, Programmatically Generated, Frequency-Scalable Six-Port Receiver in 130-nm CMOS☆28Updated this week
- Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"☆224Oct 6, 2025Updated 9 months ago
- A tapeout-ready structure for hierarchical analog design (v0.1).☆26Jan 16, 2026Updated 6 months ago
- IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively s…☆957Updated this week
- Expose what functional RTL benchmarks leave unanswered. Evidence profiles for AI-generated RTL; research collaborators and design partner…☆18Jul 22, 2026Updated last week
- Open Agentic Design Automation - The open agent interface for EDA: Agent–EDA Contract☆18Updated this week
- This repository contains a comprehensive collection of parameterized and configurable RTL modules written in Verilog, organized by catego…☆18Sep 23, 2025Updated 10 months ago
- [WIP] Open-source DFT flow☆41May 9, 2026Updated 2 months ago
- ☆36Updated this week
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- AI assisted Shell, aka "Ash". Wraps around your existing shell and brings AI-LLM to the CLI for analyzing EDA files.☆29Apr 6, 2026Updated 3 months ago
- An Open-Source ASIC Design Template for the SG13G2 IHP Open-PDK☆21Jul 21, 2026Updated last week
- IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)☆223Jun 19, 2026Updated last month
- OpenTestability is an open-source tool for structural analysis of digital circuits, enabling computation of SCOAP metrics, Controllibilit…☆20Jul 23, 2026Updated last week
- is a comprehensive, cross-platform standalone application built for modern Analog IC Designers. It streamlines the $g_m/I_D$ design metho…☆19Apr 2, 2026Updated 4 months ago
- ☆37Jul 23, 2026Updated last week
- GUI for gds2palace RFIC FEM simulation worklow☆31Mar 15, 2026Updated 4 months ago
- ☆95Jan 15, 2025Updated last year
- Introduction to Chip Design☆69Jul 3, 2026Updated last month
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- An Open-Source Analog Mixed-Signal Chip Design Template & Tutorial for the ihp-sg13g2 Open-PDK☆26Updated this week
- Examples of analog circuit design with sEKV for the open source IHP 130nm technology☆31Jun 5, 2025Updated last year
- https://caravel-user-project.readthedocs.io☆240Feb 25, 2025Updated last year
- Testfield: T593☆15Apr 27, 2026Updated 3 months ago
- ☆31Sep 3, 2025Updated 11 months ago
- HeiChips 2025 Tapeout on IHP SG13G2 130nm process☆23Apr 10, 2026Updated 3 months ago
- Custom ASIC Design for SHA-256☆14Nov 22, 2025Updated 8 months ago
- RFIC design course developed at Johannes Kepler University, Department for Integrated Circuits☆44Jul 7, 2026Updated 3 weeks ago
- cheriot-kudu is a 32-bit dual-issue RISC-V MCU core with CHERIoT support☆17Updated this week
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- A library of open PDK packages☆123Jul 21, 2026Updated last week
- Course project of Computer Architecture, designed by single-cycle datapath. The verilog code could be completely compiled by Quartus II.☆31Feb 14, 2021Updated 5 years ago
- This project curates a comprehensive collection of research papers examining the relationship between artificial intelligence and sustain…☆17Updated this week
- A neural network fast inference library implementing Coral Edge TPU emulator using AVX2.☆15Mar 30, 2022Updated 4 years ago
- Design of miller compensated 2 stage opamp using open source SKY130PDK☆18Jun 18, 2025Updated last year
- 1G‑style Ethernet PHY PCS block in Sky130 using OpenLane☆18Feb 15, 2026Updated 5 months ago
- Tiny Tapeout breakout PCBs☆19Feb 10, 2026Updated 5 months ago