simonjhall / llvm_qpu
Mirror of official llvm git repository located at http://llvm.org/git/llvm. Updated hourly.
☆13Updated 10 years ago
Alternatives and similar repositories for llvm_qpu:
Users that are interested in llvm_qpu are comparing it to the libraries listed below
- firrtlator is a FIRRTL C++ library☆21Updated 8 years ago
- a simple C-to-Verilog compiler☆48Updated 8 years ago
- the actual epiphany backend☆20Updated 11 years ago
- HSAIL LLVM Tree - Development has stopped on this branch This was a development branch☆15Updated 8 years ago
- Macro assembler for Broadcom VideoCore IV aka Raspberry Pi GPU☆66Updated 10 months ago
- Tools and Examples for IcoBoard☆80Updated 3 years ago
- Reference Hardware Implementations of Bit Extract/Deposit Instructions☆24Updated 7 years ago
- Open source fpga project leveraging vtr CAD flow.☆26Updated 2 years ago
- LIB:Library for interacting with an FPGA over USB☆84Updated 4 years ago
- ☆26Updated 10 years ago
- Open Processor Architecture☆26Updated 9 years ago
- Yet Another VHDL tool☆31Updated 7 years ago
- Experiments with Yosys cxxrtl backend☆48Updated 3 months ago
- The BERI and CHERI processor and hardware platform☆50Updated 8 years ago
- Exploration of alternative hardware description languages☆28Updated 7 years ago
- lightweight open HLS for FPGA rapid prototyping☆20Updated 7 years ago
- A reconfigurable and extensible VLIW processor implemented in VHDL☆32Updated 10 years ago
- ☆59Updated last year
- Bachelor thesis Martijn Bakker -- Numerical mathematics on FPGAs using CλaSH☆28Updated 9 years ago
- MRSIC32 ISA documentation and development☆90Updated last year
- HDMI Expansion Modules compatible with the Pmod standard☆11Updated 7 years ago
- An experimental System-on-Chip with a custom compiler toolchain.☆60Updated 5 years ago
- GROM-8 CPU☆19Updated 7 years ago
- Compiler for the VC4CL OpenCL implementation☆118Updated last year
- Embedded Template Library☆59Updated last year
- FPGA assembler! Create bare-metal FPGA designs without Verilog or VHDL (Not to self: use Lisp next time)☆53Updated 3 years ago
- A fork of the main Verilator project for development work. The changes here are in preparation for committing back to the main project.☆18Updated 10 years ago
- Resource-efficient 16-bit CPU architecture for FPGA control plane☆96Updated 2 months ago
- resurrected LLVM "C Backend", with improvements☆18Updated 8 years ago
- RISC-V XBitmanip Extension☆27Updated 6 years ago