Rocq framework to define the semantics of CPU architectures
☆40Oct 30, 2026Updated this week
Alternatives and similar repositories for archsem
Users that are interested in archsem are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A tool for cross-checking Verilog compilers☆15Apr 16, 2025Updated last year
- A DSL for formal verification of hardware and software systems using Rocq/Coq.☆13Updated this week
- Verified Verilog Equivalence checker, written and verified in Coq.☆14Oct 20, 2026Updated last week
- ☆14May 7, 2026Updated 5 months ago
- A Lean-embedded framework to verify Verilog modules☆17Oct 6, 2026Updated 3 weeks ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆13Apr 28, 2025Updated last year
- Mechanized baselines for various type system features☆19Apr 14, 2026Updated 6 months ago
- A collection of datapath circuit design and verification benchmarks☆19Aug 24, 2026Updated 2 months ago
- Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model☆97Oct 13, 2026Updated 2 weeks ago
- Verified Extraction from Rocq to OCaml/Malfunction☆20Oct 9, 2026Updated 3 weeks ago
- Symbolic execution tool for Sail ISA specifications☆100Sep 23, 2026Updated last month
- Verified Intermediate Representation☆133Updated this week
- Equivalence Verification Checking for Code Transformation via Equality Saturation☆13Jun 1, 2026Updated 4 months ago
- ☆13Oct 25, 2026Updated last week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- generating formally verified C code with LLMs (thesis Merlijn Sevenhuijsen) http://urn.kb.se/resolve?urn=urnsediva-356745☆14Jun 7, 2026Updated 4 months ago
- TAIDL: Tensor Accelerator ISA Definition Language☆25Oct 20, 2026Updated last week
- A enumerator for MLIR, relying on the information given by IRDL.☆26Oct 8, 2026Updated 3 weeks ago
- Coinductive Interaction Trees in Lean4 using QPFs☆20Oct 18, 2026Updated 2 weeks ago
- Yosys RTLIL dialect for MLIR☆25Jun 12, 2025Updated last year
- FastPoly: An Efficient Polynomial Package for the Verification of Integer Arithmetic Circuits☆14Aug 5, 2025Updated last year
- ☆17Oct 13, 2026Updated 2 weeks ago
- piggybacking on the Dafny language implementation to explore interactive semi-automated verified program synthesis, combining LLMs and sy…☆18Jul 31, 2026Updated 3 months ago
- ☆10Nov 20, 2023Updated 2 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆14Nov 19, 2024Updated last year
- An intermediate verification language☆30Jan 4, 2026Updated 9 months ago
- APS: An open-source toolchain towards agile processor specialization based on MLIR☆22Jan 17, 2026Updated 9 months ago
- Compositional Verification of Composite Byzantine Protocols☆13Aug 24, 2024Updated 2 years ago
- Logic circuit analysis and optimization☆53Feb 2, 2026Updated 8 months ago
- Functions and proofs about game trees in Rocq, implemented as rose trees.☆20Sep 11, 2026Updated last month
- Verified graph rewriting (for dataflow circuits).☆29Updated this week
- ☆14Aug 17, 2026Updated 2 months ago
- ☆21Aug 1, 2015Updated 11 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Tutorial for refinement based verification☆20Sep 15, 2026Updated last month
- ShakeFlow: Functional Hardware Description with Latency-Insensitive Interface Combinators (ASPLOS 2023)☆60Jan 23, 2025Updated last year
- HazardFlow: Modular Hardware Design of Pipelined Circuits with Hazards IMPORTANT: DON'T FORK!☆21Dec 5, 2024Updated last year
- A core language for rule-based hardware design 🦑☆191Dec 10, 2025Updated 10 months ago
- A reflection-based proof tactic for lattices in Coq☆21Mar 17, 2026Updated 7 months ago
- Semantic Type Soundness in Lean 4☆19Sep 28, 2026Updated last month
- A tool for formally verifying constant-time software against hardware 🕰️☆17Feb 1, 2025Updated last year