Alternatives and similar repositories for HT42B534USB2UART

Users that are interested in HT42B534USB2UART are comparing it to the libraries listed below

• jiegec / verilog-format
  A naive verilog/systemverilog formatter
  ☆21Updated 3 months ago
• jiegec / verilog-lang
  A hand-written recursive decent Verilog parser.
  ☆11Updated 2 years ago
• thu-cs-lab / JieLabs-Web
  Backend & Frontend for JieLabs
  ☆22Updated 2 years ago
• twd2 / fpga-nat64
  A four-10gbe-port dual-stack router with IPv4 and IPv6 translation support.
  ☆31Updated 5 years ago
• CircuitCoder / ChannelOS
  What if everything is a io_uring?
  ☆16Updated 2 years ago
• dramforever / ixayoi
  (WIP) A relatively simple pipelined RISC-V core, written in Bluespec SystemVerilog
  ☆12Updated 3 years ago
• dramforever / opensbi-h
  WIP: A fork of OpenSBI, with software-emulated hypervisor extension support
  ☆39Updated 4 months ago
• xen0n / larva
  PoC LoongArch - RISC-V emulator
  ☆32Updated last year
• TrivialCompiler / Talk
  Tex source for talk slide.
  ☆10Updated 4 years ago
• jiegec / jtag-remote-server
  Remote JTAG server for remote debugging
  ☆40Updated last year
• Harry-Chen / TrivialTomasulo
  Tomasulo Simulator written in React as the project for Computer Architecture course, Spring 2019, Tsinghua University
  ☆11Updated 6 years ago
• typekernel / typekernel
  Warning: 🕳 ahead!
  ☆16Updated 5 years ago
• CircuitCoder / cidr-calc
  CIDR union / subtraction
  ☆14Updated 5 months ago
• rustsbi / serde-device-tree
  Serialize & deserialize device tree binary using serde
  ☆21Updated 2 months ago
• jiegec / chisel-memory-lower
  Lower chisel memories to SRAM macros
  ☆12Updated last year
• rcore-os / x86-smpboot
  Booting multi-processors on x86 bare-metal.
  ☆11Updated 3 years ago
• dramforever / urvirt
  User-mode trap-and-emulate hypervisor for RISC-V
  ☆13Updated 3 years ago
• Harry-Chen / rust-mips
  Rust library for low-level abstraction of MIPS processors
  ☆31Updated 5 years ago
• char-fish-after-lunch / SystemOnCat
  An SoC with multiple RISC-V IMA processors.
  ☆19Updated 6 years ago
• twd2 / roload
  My DAC '21 work open-sourced.
  ☆14Updated 4 years ago
• jiegec / SPECCPU2017Harmony
  Run SPEC CPU 2017 benchmark on OpenHarmony/HarmonyOS NEXT
  ☆25Updated 3 weeks ago
• jiegec / rvv-kernels
  Implements kernels with RISC-V Vector
  ☆22Updated 2 years ago
• meow-chip / MeowRouter
  A hardware accelerated IP packet forwarder running on programmable ICs
  ☆16Updated 2 years ago
• Fugoes / ctrj
  Compile Time RapidJSON: A compile time C++ header only JSON library without bloating yet another hand-crafted JSON parser based on RapidJ…
  ☆15Updated 5 years ago
• CircuitCoder / MeoWave
  ☆10Updated last year
• Oyami-Srk / RISCV-GDB-Paging
  Paging Debug tool for GDB using python
  ☆13Updated 3 years ago
• CircuitCoder / ld.meow.so
  Toy ELF dynlinker & interp
  ☆10Updated last year
• CircuitCoder / mill
  RV32I by cats
  ☆16Updated last year
• LyricZhao / ThinRouter
  A SystemVerilog implementation of MIPS32 CPU and RIP router
  ☆23Updated 5 years ago
• jiegec / naiverouter
  A router IP written in Verilog.
  ☆13Updated 5 years ago