Alternatives and similar repositories for dnn-kernel-fpga

Users that are interested in dnn-kernel-fpga are comparing it to the libraries listed below

• ryuz / BinaryBrain
  Binary Neural Network Framework for FPGA(Differentiable LUT)
  ☆171Updated 5 months ago
• HirokiNakahara / FPGA_lecture
  Source Codes for a lecture entitled "Parallel and Reconfigurable VLSI Computing" in Tokyo Tech.
  ☆28Updated 4 years ago
• polyphony-dev / polyphony
  Polyphony is Python based High-Level Synthesis compiler.
  ☆108Updated last year
• HirokiNakahara / FPGA_AI_Edge_Contest_2019
  Sample scripts for FPGA-based AI Edge Contest 2019
  ☆12Updated 5 years ago
• Taiki-azrs / RaspiGPGPU_guide
  「Raspberry Pi GPGPU入門」のリポジトリ
  ☆23Updated 4 years ago
• NNgen / nngen
  NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
  ☆360Updated 2 years ago
• HirokiNakahara / GUINNESS
  GUINNESS: A GUI-based binarized deep Neural NEtwork SyntheSizer toward an FPGA
  ☆181Updated 6 years ago
• ryuz / jelly
  Original FPGA platform
  ☆71Updated this week
• tokuden / NahiViva
  Vivadoの操作を自動化する
  ☆13Updated 4 years ago
• jun1okamura / glossary_semiconductor_design_terms_for_beginners
  ☆15Updated 2 years ago
• rits-drsl / ZybotR2-96-fpt19
  An UGV-system using SoC-FPGA developed for FPGA design competition held on ICFPT2019
  ☆18Updated 5 years ago
• nlsynth / karuta
  Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for F…
  ☆107Updated 4 years ago
• renesas-rz / rzv_drp-ai_tvm
  RUHMI (Robust Unified Heterogeneous Model Integration) for RZ/V series is a framework for AI model optimization and deployment, powered b…
  ☆55Updated last week
• dtc-work / Qumico
  ☆37Updated 3 years ago
• fixstars / xg_mac
  10G Ethernet MAC implementation
  ☆23Updated 5 years ago
• fpga-design-contest / ad-refkit
  autonomous driving contest reference kit
  ☆10Updated 4 years ago
• tom01h / tiny-dnn-fpga
  CNN Accelerator for Zynq
  ☆13Updated 6 years ago
• otamajakusi / riscv-step-by-step
  RISC-V kernel step-by-step implmenetation
  ☆12Updated 6 years ago
• kadomoto / poyo-v
  Open source RISC-V IP core for FPGA/ASIC design
  ☆32Updated last year
• shioyadan / advanced-computer-organization
  ☆185Updated last month
• Tiryoh / jetson-nano-containers
  Dockerfiles for Jetson Nano
  ☆28Updated 3 years ago
• ikwzm / ZynqMP-FPGA-Ubuntu18.04-Ultra96
  Ubuntu 18.04 Desktop for Ultra96/Ultra96-V2
  ☆19Updated 5 years ago
• panda5mt / depth_estimate_blur
  Defocusによる画像ボケを利用した深度推定
  ☆55Updated 2 years ago
• ciniml / seccamp_riscv_cpu
  セキュリティ・キャンプ 2022-2024 RISC-V CPU自作ゼミ 資料置き場
  ☆39Updated 9 months ago
• wadayama / MIKA2019
  repository for MIKA2019
  ☆25Updated last year
• t-hishinuma / DD-AVX_v3
  Library of High Precision Sparse Matrix Operations Accelerated by SIMD
  ☆44Updated 4 years ago
• i4kimura / chip_architect
  Translation of http://chip-architect.com/news/2003_09_21_Detailed_Architecture_of_AMDs_64bit_Core.html
  ☆11Updated 6 years ago
• lp6m / VexRiscv_Ultra96
  Implementation VexRiscv on ultra96
  ☆13Updated 3 years ago
• miyo / learning_fpga
  ☆10Updated 5 years ago
• karaage0703 / mario-ai-challenge
  AI Mario challenges you to clear all stage of Super Mario game.
  ☆66Updated last year