Alternatives and similar repositories for veryl-riscv-book

Users that are interested in veryl-riscv-book are comparing it to the libraries listed below

• VLSI-JP / VLSI-JP.github.io
  ☆26Updated last week
• shioyadan / advanced-computer-organization
  ☆178Updated last year
• NextMicon / NextMiconIDE
  🛠️ Graphical IDE for NextMicon
  ☆28Updated last year
• panda5mt / KyogenRV
  The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.
  ☆46Updated 4 years ago
• ciniml / seccamp_riscv_cpu
  セキュリティ・キャンプ 2022-2024 RISC-V CPU自作ゼミ 資料置き場
  ☆38Updated 7 months ago
• msyksphinz-self / support_ca_llvm_book
  ☆142Updated last year
• RuSys / Verugent
  Verilog generation tool written in Rust
  ☆59Updated 2 years ago
• nlsynth / karuta
  Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for F…
  ☆108Updated 3 years ago
• vaj / riscv-os
  A tiny educational OS for RISC-V
  ☆26Updated last year
• i4kimura / chisel-minicpu
  ☆14Updated 6 years ago
• kadomoto / poyo-v
  Open source RISC-V IP core for FPGA/ASIC design
  ☆31Updated last year
• cpuex2019-yokyo / core
  RISC-V (rv32imf) CPU implemented in System Verilog for cpuex2019 @ UTokyo
  ☆13Updated 5 years ago
• Alignof / carron
  rv32/64imac emulator
  ☆32Updated last year
• Alignof / hikami
  A lightweight Type-1 hypervisor for RISC-V H-extension, featuring RISC-V extension emulation. (on Milk-V Megrez)
  ☆54Updated 3 weeks ago
• msyksphinz-self / swimmer_riscv
  Instruction set simulator for RISC-V
  ☆54Updated 5 years ago
• ciniml / seccamp_2022_riscv_cpu
  セキュリティキャンプ 2022 Y4 RISC-V CPU自作ゼミ 講義資料
  ☆29Updated last year
• ciniml / fpga_samples
  FPGA samples
  ☆23Updated last month
• sakura-internet / nvme-pcie-to-fabrics-proxy
  (under construction) Experimental circuit design for FPGA based PCIe accelerator board providing emulated NVMe/PCIe device that its read/…
  ☆25Updated 2 years ago
• shibatchii / RISC-V
  RISC-V documentation transrate to Japanese.
  ☆73Updated 3 years ago
• chadyuu / riscv-chisel-book
  ☆235Updated 2 years ago
• cpu-dev / cpu-dev.github.io
  ☆16Updated 5 years ago
• ryuz / BinaryBrain
  Binary Neural Network Framework for FPGA(Differentiable LUT)
  ☆164Updated 3 months ago
• nuta / microkernel-book
  『自作OSで学ぶマイクロカーネルの設計と実装』サポートサイト
  ☆247Updated 6 months ago
• tomabou / cpu_core
  ☆10Updated 6 years ago
• nlsynth / iroha
  Intermediate Representation Of Hardware Abstraction (LLVM-ish for HLS)
  ☆35Updated 4 years ago
• ep2k / epGB
  Game Boy / Game Boy Color emulator running on an FPGA
  ☆18Updated last week
• polyphony-dev / polyphony
  Polyphony is Python based High-Level Synthesis compiler.
  ☆108Updated 9 months ago
• kazunori279 / CPU32
  Tiny MIPS for Terasic DE0
  ☆36Updated 11 years ago
• hikalium / wasabi
  Toy web browser + OS in Rust = wasabi
  ☆274Updated 2 weeks ago
• horie-t / homemade-riscv
  『プログラマのためのFPGAによるRISC-Vマイコンの作り方』のサポート・リポジトリ
  ☆13Updated 6 years ago