buaa-zzx / Deep_learning_on_FPGA
在FPGA上部署深度学习项目
☆21Updated 3 years ago
Alternatives and similar repositories for Deep_learning_on_FPGA:
Users that are interested in Deep_learning_on_FPGA are comparing it to the libraries listed below
- FPGA实现动态图像识别☆15Updated 4 years ago
- Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.☆21Updated 3 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆89Updated last year
- Workflow for Executing CNN Networks on Zynq Ultrascale+ with VITIS AI. Detailed analysis, configuration, and execution of Convolutional N…☆15Updated 9 months ago
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆76Updated 3 years ago
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆22Updated 3 years ago
- hls code zynq 7020 pynq z2 CNN☆79Updated 5 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆45Updated 4 years ago
- This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step…☆38Updated 2 months ago
- A simple demo to implement the Handwritten Mathematical Calculator on PYNQ-Z2 FPGA platform by using HLS.☆37Updated 4 years ago
- Pynq computer vision examples with an OV5640 camera☆44Updated 4 years ago
- 2018第二届全国大学生FPGA创新设计邀请赛的作品☆57Updated 6 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆44Updated 4 years ago
- ☆28Updated 4 months ago
- ☆50Updated last year
- 中文：☆94Updated 5 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆107Updated 7 years ago
- Codes to implement MobileNet V2 in a FPGA☆24Updated 4 years ago
- The CNN based on the Xilinx Vivado HLS☆37Updated 3 years ago
- ☆43Updated 6 years ago
- This work is based on PYNQ-Z2 development board provided by organizer, and adopts the cooperation scheme of hardware and software to buil…☆41Updated 5 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆47Updated 6 years ago
- 搭建卷积神经网络并利用FPGA加速实现交通标志识别☆26Updated 4 years ago
- Convolutional Neural Network RTL-level Design☆42Updated 3 years ago
- FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ☆19Updated 5 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆163Updated 9 months ago
- Some attempts to build CNN on PYNQ.☆24Updated 5 years ago
- At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA☆31Updated 6 years ago
- An AIoT project based on PYNQ-Z2 FPGA Evaluation board. Reading image from usb camera and running yolov3-tiny detection with DPU and usin…☆11Updated 2 years ago
- Convolutional Neural Network Using High Level Synthesis☆84Updated 4 years ago