Alternatives and similar repositories for CedarLogic

Users that are interested in CedarLogic are comparing it to the libraries listed below

• kkirss / vcb-riscv
  ViPeR 32-bit Pipelined RISC-V CPU
  ☆11Updated last month
• kittybupu / openVCB
  An open source implementation of the Virtual Circuit Board loader, assembler, and simulation engine.
  ☆86Updated 2 years ago
• cnlohr / embeddedDOOM
  "emdoom" - a port of DOOM targeted for memory-strapped systems.
  ☆117Updated 2 years ago
• F35idk / spice-cpu
  An analog, transistor-level simulation of an 8-bit CPU in SPICE
  ☆12Updated 4 years ago
• mortie / rv32i-logisim-cpu
  Implementation of RV32I in Logisim-evolution.
  ☆24Updated last year
• algofoogle / raybox-zero
  Minimal implementation of Raybox HDL ray caster concept
  ☆25Updated last month
• jrmoserbaltimore / risc-v-cpu-asynchronous
  A RISC-V CPU implementation
  ☆13Updated 5 years ago
• sellicott / tcc-riscv32
  Port TCC (Tiny C Compiler) to support Risc-V 32 targets (specifically for the ESP32-C3). This project is a work-in-progress and is not cu…
  ☆69Updated last month
• nickmqb / fpga_craft
  A voxel game/Minecraft clone for the iCE40 UP5K FPGA
  ☆208Updated 3 years ago
• sifferman / fpga_screensaver
  This project implements the VGA protocol and allows custom images to be displayed to the screen using the Sipeed Tang Nano FPGA dev board…
  ☆12Updated last year
• juj / gowin_fpga_code_generators
  Interactive code generators for Gowin FPGAs
  ☆15Updated 2 years ago
• Amirarsalan-sn / RISCV-multi-cycle-processor
  A multi-cycle processor designed according to the instruction set(assembly language) of RISC-V using the System Verilog HDL
  ☆15Updated 2 years ago
• ICE-V-Wireless / ICE-V-Wireless
  Combined ESP32C3 and iCE40 FPGA board
  ☆69Updated 7 months ago
• rolandbernard / kleine-riscv
  A small and simple rv32i core written in Verilog
  ☆13Updated 3 years ago
• ucsbieee / mapache64
  Custom 6502 Video Game Console
  ☆11Updated last year
• xhackerustc / uc-rv32ima
  Run Linux on MCUs such as ESP32C3 with RISC-V emulator
  ☆116Updated last year
• amstan / qoi-fpga
  Quite OK Image FPGA Encoder and Decoder
  ☆20Updated 2 years ago
• pineapple-one / logisim-simulation
  Simulation in Logisim-Evolution HC
  ☆34Updated 4 years ago
• mikeakohn / riscv_fpga
  Implementation of a RISC-V CPU in Verilog.
  ☆16Updated 5 months ago
• smunaut / iCE40linux
  Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker
  ☆100Updated 2 years ago
• suarezvictor / CflexHDL
  Design digital circuits in C. Simulate really fast with a regular compiler.
  ☆174Updated 2 years ago
• AngeloJacobo / ULX3S_FPGA_Camera_Streaming
  Verilog design files and Icestudio file for streaming the OV7670 camera using ULX3S FPGA Board
  ☆23Updated 3 years ago
• mirimmad / riscv
  RISC-V(RV32IM) emulator with support for syscalls.
  ☆29Updated last year
• smunaut / doom_riscv
  Doom classic port to lightweight RISC‑V
  ☆94Updated 3 years ago
• Najsztub / jtagGUI
  Python GUI for UrJTAG library.
  ☆20Updated 2 years ago
• Johnlon / spam-1
  Home Brew 8 Bit CPU Hardware Implementation including a Verilog simulation, an assembler, a "C" Compiler and this repo also contains my r…
  ☆68Updated last year
• jvitkauskas / Altera-Cyclone-IV-board-V3.0
  Documentation for Chinese ALTERA Cyclone IV EP4CE6 FPGA Development Board
  ☆131Updated 2 years ago
• verilog-indeed / nano4k_hdmi_tx
  Open-source HDMI/DVI transmitter for the Gowin GW1NSR-powered Tang Nano 4K
  ☆23Updated 2 years ago
• stoffera / fbdoom
  A Linux Framebuffer port of the original Doom
  ☆37Updated 8 months ago
• x653 / xv6-riscv-fpga
  Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).
  ☆53Updated 2 years ago