☆27May 31, 2023Updated 3 years ago
Alternatives and similar repositories for Async-Click-Library
Users that are interested in Async-Click-Library are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A RISC-V CPU implementation☆17Apr 9, 2020Updated 6 years ago
- Carrier for efabless Caravel chip used for Google/Skywater 130nm shuttle program.☆18Sep 24, 2021Updated 4 years ago
- Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project☆156Updated this week
- UNICCASS-ICDESIGN-TOOLS is a Docker image that provides a pre-configured environment with essential tools for the design and verification…☆17Mar 19, 2026Updated 4 months ago
- Pulsar asynchronous synthesis framework☆13Jun 29, 2026Updated 3 weeks ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Lab Material for CAE☆44Jan 6, 2026Updated 6 months ago
- Analog and power building blocks for sky130 pdk☆22Mar 3, 2021Updated 5 years ago
- ECE 4551: Computer Architecture☆11Nov 25, 2019Updated 6 years ago
- Wavious Wlink☆12Oct 28, 2021Updated 4 years ago
- ☆12Sep 30, 2018Updated 7 years ago
- ASIC Design lab. Pipelined, Cached, Multicore MIPS Processor☆11Aug 23, 2017Updated 8 years ago
- My personal Electronics projects versioning repo.☆13Dec 9, 2013Updated 12 years ago
- Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns☆16Dec 8, 2020Updated 5 years ago
- Chisel Fixed-Point Arithmetic Library☆18Dec 15, 2025Updated 7 months ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- Yosys plugin for logic locking and supply-chain security☆24Apr 5, 2025Updated last year
- Minimal set of files required to build the WSPR decoder by Joe Taylor, K1JT and Steve Franke, K9AN.☆14Jul 24, 2025Updated last year
- This is Max's blog, something interesting in it.☆13Jan 1, 2023Updated 3 years ago
- ☆17Jul 10, 2026Updated 2 weeks ago
- ☆16Sep 26, 2022Updated 3 years ago
- An update of the AVI1861 drop-in replacement for the CDP1861☆13Nov 16, 2025Updated 8 months ago
- A dynamic verification library for Chisel.☆163Nov 9, 2024Updated last year
- Experimental iOS app embedding Fabrice Bellard's TinyEMU☆14May 26, 2020Updated 6 years ago
- tool for converting vcd(value change dump) to ate pattern.☆11Oct 22, 2015Updated 10 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- BFM Tester for Chisel HDL☆14Nov 27, 2021Updated 4 years ago
- ☆12Sep 17, 2023Updated 2 years ago
- A compiler from a subset of Rust to Brainfuck☆16Oct 2, 2024Updated last year
- An Open Source Link Protocol and Controller☆29Jul 26, 2021Updated 5 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆94Aug 10, 2018Updated 7 years ago
- Experiments with fixed function renderers and ChiselHDL☆61Updated this week
- A parameterizable Vivado HLS project (C/C++) that implements a master and slave AXI-Stream to AXI-Memory-Mapped data mover (AXI-S default…☆16Aug 29, 2018Updated 7 years ago
- ACT hardware description language and core tools.☆130Updated this week
- Repository to show an example of how to do version control with Vivado and Xilinx SDK☆15Nov 10, 2017Updated 8 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- ☆16Jan 25, 2026Updated 6 months ago
- An event-driven circuit simulator, written in C++ and designed to print to terminal output.☆11Sep 7, 2012Updated 13 years ago
- LiteX project for the ButterStick bootloader☆14Mar 13, 2023Updated 3 years ago
- SDL-based Nascom 2 emulator☆12Mar 24, 2024Updated 2 years ago
- RedPitaya application: Software Defined Radio (SDR) for an 8-channel WSPR receiver.☆10Jan 29, 2018Updated 8 years ago
- This project aims to implement a full SDRAM controller for Altera DE2-115 FPGA☆14Nov 24, 2014Updated 11 years ago
- High-speed real time streaming video on Zybo Z7-10☆17May 5, 2019Updated 7 years ago