yuasatakayuki / SpaceWireToGigabitEtherLinks
Open-source version of SpaceWire-to-GigabitEther using ZestET1
☆23Updated 9 years ago
Alternatives and similar repositories for SpaceWireToGigabitEther
Users that are interested in SpaceWireToGigabitEther are comparing it to the libraries listed below
Sorting:
- Digital Signal Processing and Well-Known Modulations on HDL☆41Updated last month
- PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.☆37Updated 2 years ago
- A truly opensource camera serial interface. No frills. No backdoors that compromise security. Outstanding signal integrity. Hi-rez video …☆51Updated 2 weeks ago
- Small footprint and configurable JESD204B core☆44Updated last month
- Extensible FPGA control platform☆62Updated 2 years ago
- SpaceWire☆13Updated 10 years ago
- VHDL PCIe Transceiver☆28Updated 4 years ago
- An RFSoC Frequency Planner developed using Python.☆29Updated 2 years ago
- assorted library of utility cores for amaranth HDL☆93Updated 9 months ago
- LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled☆60Updated this week
- C++ 17 Hardware abstraction layer generator from systemrdl☆12Updated 3 weeks ago
- Fixed-point math library with VHDL, Python and MATLAB support☆23Updated 4 months ago
- An open-source HDL register code generator fast enough to run in real time.☆71Updated last week
- A lightweight Controller Area Network (CAN) controller in VHDL☆26Updated 8 months ago
- A basic Soft(Gate)ware Defined Radio architecture☆88Updated last year
- Slides and material for Xilinx bootcamp☆22Updated 3 years ago
- An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has bu…☆28Updated 5 months ago
- A collection of phase locked loop (PLL) related projects☆106Updated last year
- The Strathclyde RFSoC Studio Installer for PYNQ.☆32Updated 2 years ago
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆33Updated 4 months ago
- general-cores☆20Updated last week
- JESD204b modules in VHDL☆30Updated 6 years ago
- ☆32Updated 2 years ago
- Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…☆88Updated 2 years ago
- Demo projects for various Kintex FPGA boards☆60Updated last month
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆29Updated 2 years ago
- Demonstration of Automatic Gain Control with PYNQ☆14Updated 3 years ago
- FPGA and Digital ASIC Build System☆74Updated 2 weeks ago
- This is a guide for bringing up custom ZYNQ boards. It covers test sequence, test method, common error situations and code and project th…☆69Updated 7 years ago
- Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC☆96Updated 8 years ago