Alternatives and similar repositories for Correlator

Users that are interested in Correlator are comparing it to the libraries listed below

• xupgit / FPGA-Design-Flow-using-Vivado
  This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite
  ☆102Updated 6 years ago
• strath-sdr / rfsoc_sam
  RFSoC Spectrum Analyser Module on PYNQ.
  ☆90Updated 2 weeks ago
• Jefferson-Lopes / FFT
  FFT algorithm for fpga
  ☆25Updated 4 years ago
• ATaylorCEngFIET / Xilinx_BootCamp
  Slides and material for Xilinx bootcamp
  ☆22Updated 4 years ago
• Xilinx / Vitis_Model_Composer
  Vitis Model Composer Examples and Tutorials
  ☆116Updated 2 weeks ago
• Xilinx / PYNQ-ZU
  PYNQ-ZU, AUP UltraScale+ MPSoC academic board
  ☆28Updated 4 months ago
• adamchristiansen / fpga-ethernet-udp
  An HDL design for sending data over Ethernet
  ☆49Updated 5 months ago
• ZipCPU / dblclockfft
  A configurable C++ generator of pipelined Verilog FFT cores
  ☆254Updated last year
• ATaylorCEngFIET / Vitis_Hero
  ☆29Updated 3 years ago
• Xilinx / RFSoC2x2-PYNQ
  RFSoC2x2 board repo for PYNQ
  ☆17Updated 3 years ago
• robertofem / CycloneVSoC-examples
  Examples using the Cyclone V SoC chip
  ☆112Updated 6 years ago
• Xilinx / RFSoC-PYNQ
  Python productivity for RFSoC platforms
  ☆88Updated 3 months ago
• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆113Updated 2 weeks ago
• strath-sdr / rfsoc_qsfp_offload
  RFSoC QSFP Data Offload Design with GNU Radio
  ☆26Updated last year
• Xilinx / PYNQ_RFSOC_Workshop
  Open-sourcing the PYNQ & RFSoC workshop materials
  ☆63Updated 5 years ago
• Digilent / Eclypse-Z7
  ☆21Updated last month
• suoto / fpga_cores
  ☆33Updated 2 years ago
• mathworks / HDL-Coder-Self-Guided-Tutorial
  Learn how to deploy an algorithm to an FPGA using MATLAB and Simulink.
  ☆89Updated this week
• alexforencich / verilog-dsp
  Verilog digital signal processing components
  ☆170Updated 3 years ago
• sarafs1926 / ZCU216-PYNQ
  Board repo for the ZCU216 RFSOC
  ☆32Updated 3 years ago
• hdl-modules / hdl-modules
  A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
  ☆197Updated last week
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆60Updated last year
• nandland / memory
  Single Port RAM, Dual Port RAM, FIFO
  ☆31Updated 3 years ago
• tomverbeure / kv260_bringup
  Temporary repo to gather information about the Kria KV260 board
  ☆76Updated 4 years ago
• strath-sdr / rfsoc_radio
  PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.
  ☆41Updated 2 weeks ago
• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆129Updated last month
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆32Updated 2 years ago
• makararasi / UVM_AXI4-Stream
  ☆14Updated 3 years ago
• owocomm-0 / fpga-fft
  A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
  ☆127Updated 5 years ago
• AngeloJacobo / OpenLANE-Sky130-Physical-Design-Workshop
  Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
  ☆74Updated 3 years ago