wredan / Karnaugh-Map-SolverLinks
Karnaugh maps solver is a web app that takes the truth table of a function as input, transposes it onto the respective Karnaugh map and finds the minimum forms SOP and POS according to the visual resolution method by Maurice Karnaugh, American physicist and mathematician.
☆34Updated last year
Alternatives and similar repositories for Karnaugh-Map-Solver
Users that are interested in Karnaugh-Map-Solver are comparing it to the libraries listed below
Sorting:
- A basic working RISCV emulator written in C☆77Updated last year
- Simple Yet Powerful RISC-V Computer☆123Updated last year
- A logic circuit simulator made with p5.js library.☆69Updated 2 years ago
- RISC-V Assembly Language Programming☆243Updated last month
- IIT Madras OpenMP (IMOP) compiler framework is an open-source, source-to-source, OpenMP-aware compiler for OpenMP (and serial) C programs…☆25Updated last year
- RISC-V instruction set simulator built for education☆38Updated 2 years ago
- RISC-V emulator in python☆63Updated last year
- A Small RISC-V Virtual Machine☆92Updated 3 years ago
- RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC☆101Updated 3 years ago
- A Malloc-Free SHET Client Library for Microcontrollers☆47Updated 8 years ago
- RISC-V Online Assembler using Emscripten, Gnu Binutils☆63Updated 2 years ago
- A visual simulator for teaching computer architecture using the RISC-V instruction set☆321Updated last week
- Hardware description language (HDL) parser, and Hardware simulator.☆89Updated 7 years ago
- Graphical-Micro-Architecture-Simulator☆122Updated 7 months ago
- 32bit Simplifier of Boolean functions☆20Updated 7 years ago
- This tutorial discusses technical issues to develop your own linux device driver. The aim of this tutorial is to provide, easy and practi…☆43Updated 4 years ago
- Standalone C compiler for RISC-V and ARM☆98Updated last year
- Tutorial on building your own CPU, in Verilog☆35Updated 3 years ago
- Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).☆58Updated 2 years ago
- VS Code extension with the Venus RISC-V simulator☆87Updated last year
- Visual Simulation of Register Transfer Logic☆110Updated 5 months ago
- A complete Parser for C-Language using Yacc.☆113Updated 4 years ago
- ☆52Updated 3 years ago
- C89/C90 C99 C11 C17/C18 C23.☆27Updated 2 years ago
- Minispec Hardware Description Language☆23Updated last year
- Advanced Operating System Course at ETHZ☆20Updated 5 years ago
- Simple C Compiler written in Python☆65Updated 3 years ago
- RISC-V emulator in C☆33Updated 4 years ago
- Simple risc-v emulator, able to run linux, written in C.☆147Updated last year
- This repository contains the verilog code files of Single Cycle RISC-V architecture☆40Updated 6 years ago