Mazin-O3 / Veecom
Simple Yet Powerful RISC-V Computer
☆117Updated 3 months ago
Alternatives and similar repositories for Veecom:
Users that are interested in Veecom are comparing it to the libraries listed below
- A 16-bit RISC CPU with 32 instructions built with Digital for running on an FPGA.☆118Updated 2 years ago
- Simple risc-v emulator, able to run linux, written in C.☆139Updated last year
- Tutorial on building your own CPU, in Verilog☆33Updated 2 years ago
- A basic 8-bits computer created with LogiSim digital circuit simulator☆107Updated 4 years ago
- Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).☆46Updated 2 years ago
- A c/RISCV of "Let's Build a Compiler" by Jack Crenshaw☆96Updated 2 years ago
- A little risc-v assembly OS that can run DOOM on a QEMU riscv64 Virt☆44Updated 9 months ago
- Standalone C compiler for RISC-V and ARM☆83Updated 11 months ago
- RISC-V Assembly Language Programming☆230Updated 8 months ago
- From-scratch C compiler for my custom 16-bit CPU☆69Updated last year
- Notes on building a 8bit CPU☆53Updated 7 years ago
- Home Brew 8 Bit CPU Hardware Implementation including a Verilog simulation, an assembler, a "C" Compiler and this repo also contains my r…☆66Updated last year
- An unofficial assembly reference for RISC-V.☆483Updated 5 months ago
- A simple 8-bit computer build in Verilog.☆60Updated 7 months ago
- The code for the RISC-V from scratch blog post series.☆88Updated 4 years ago
- CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…☆336Updated this week
- How to download & install qemu a toolchain suitable for building and running freestanding RISC-V C/C++ programs☆55Updated 10 months ago
- Simulation in Logisim-Evolution HC☆34Updated 3 years ago
- HomebrewGPU is a simple ray tracing GPU on FPGA which implements basic ray-primitive intersection, BVH traversal, shadowing, reflection a…☆204Updated last year
- Learn how to build our own RV32I core and use it on FPGA.☆124Updated last week
- ☆42Updated 4 years ago
- A basic working RISCV emulator written in C☆65Updated last year
- Tiny programs from various sources, for testing softcores☆107Updated 2 months ago
- Bare metal RISC-V assembly hello world☆55Updated 3 years ago
- Linux capable RISC-V SoC designed to be readable and useful.☆142Updated 6 months ago
- Verilog implementation of multi-stage 32-bit RISC-V processor☆97Updated 4 years ago
- RISC-V emulator in C☆32Updated 3 years ago
- WebRISC-V: A Web-Based Education-Oriented RISC-V Pipeline Simulation Environment [PHP]☆144Updated last year
- ☆28Updated 9 months ago
- VS Code extension with the Venus RISC-V simulator☆72Updated 7 months ago