stanford-mast / ShEF

Related projects: ⓘ

• comparch-security / cache-model
  A behavioural cache model for analysing the cache behaviour under side-channel attack.
  ☆22Updated this week
• dskarlatos / ElasticCuckooHashing
  (elastic) cuckoo hashing
  ☆13Updated 4 years ago
• aakahlow / gem5Valid_Haswell
  ☆18Updated 4 years ago
• umd-memsys / gem5
  This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews shoul…
  ☆11Updated 4 years ago
• 0x5ec1ab / gpu-tlb
  ☆24Updated 3 weeks ago
• hku-systems / cronus
  ☆16Updated 2 years ago
• gururaj-s / cleanupspec
  CleanupSpec (MICRO-2019)
  ☆16Updated 3 years ago
• cwfletcher / stt
  ☆34Updated 3 years ago
• mjyan0720 / InvisiSpec-1.0
  Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.
  ☆57Updated 4 years ago
• UT-LCA / Scalability-Phase-Simpoint-of-SPEC-CPU2017
  ☆28Updated 4 years ago
• darchr / gem5art
  Artifact, reproducibility, and testing utilites for gem5
  ☆19Updated 3 years ago
• efeslab / lapidary
  Creating beautiful gem5 simulations
  ☆44Updated 3 years ago
• gururaj-s / mirage
  MIRAGE (USENIX Security 2021)
  ☆11Updated 10 months ago
• CSL-KU / SpectreGuard
  Data-centric defense mechanism against Spectre attacks. (DAC'19)
  ☆11Updated 4 years ago
• gururaj-s / streamline
  Streamline Covert Channel Attack (presented in ASPLOS'21)
  ☆19Updated 3 years ago
• efeslab / dolma
  ☆11Updated 3 years ago
• vusec / tlbdr
  ☆16Updated 2 years ago
• CSAIL-Arch-Sec / Pensieve
  This repository provides Pensieve, a security evaluation framework for microarchitectural defenses against speculative execution attacks.
  ☆16Updated 8 months ago
• PrincetonUniversity / MosaicSim
  Heterogeneous simulator for DECADES Project
  ☆28Updated 3 months ago
• eepalms / gem5-newcache
  New Cache implementation using Gem5
  ☆13Updated 10 years ago
• seanzw / gem5-avx
  This adds partial support of AVX2 and AVX-512 to gem5.
  ☆11Updated 9 months ago
• comparch-security / cpu-sec-bench
  Security Test Benchmark for Computer Architectures
  ☆18Updated last month
• cgvwzq / cachequery
  HW interface for memory caches
  ☆26Updated 4 years ago
• darchr / parsec-benchmark
  ☆15Updated 3 years ago
• mktrm / SecSMT_Artifact
  The artifact for SecSMT paper -- Usenix Security 2022
  ☆25Updated last year
• cwfletcher / oisa
  Data oblivious ISA prototyped on the RISC-V BOOM processor.
  ☆20Updated 2 years ago
• WukLab / FPGA-OS
  ☆32Updated 3 years ago
• zzrcxb / PinnedLoads
  Gem5 implementation of Pinned Loads: Taming Speculative Loads in Secure Processors
  ☆9Updated last year
• darchr / gem5-skylake-config
  gem5 configuration for intel's skylake micro-architecture
  ☆44Updated 2 years ago
• PolyArch / gem-forge-framework
  ☆21Updated 11 months ago