BCH error-correcting code MATLAB simulator - University of Michigan (Winter, 2011)
☆13Nov 14, 2019Updated 6 years ago
Alternatives and similar repositories for bch
Users that are interested in bch are comparing it to the libraries listed below
Sorting:
- BCH (Bose-Chaudhuri-Hocquenghem) encoder and decoder built from scratch in matlab as course project for EE5160: Error Control Coding☆18Mar 31, 2017Updated 8 years ago
- A Performance Analysis and Simulation of BCH Code in Matlab☆13Feb 26, 2022Updated 4 years ago
- Polar coding, decoding, and testing☆13Oct 11, 2023Updated 2 years ago
- Fractional interpolation using a Farrow structure☆10Oct 11, 2023Updated 2 years ago
- 电子科大学生排课脚本代码☆18Aug 20, 2022Updated 3 years ago
- my emacs config☆13Mar 12, 2026Updated last week
- KYSM4是一个基于SM4国密算法的Objective-C的国密SM4算法类库☆11Mar 7, 2019Updated 7 years ago
- Code for liver lesion segmentation using different architectures☆18Apr 26, 2020Updated 5 years ago
- The hardware implementation of UDP in Bluespec SystemVerilog☆14Jun 3, 2024Updated last year
- Some useful functions to process pdf file☆20Sep 13, 2025Updated 6 months ago
- SpinalHDL components for Corundum Ethernet☆15Aug 16, 2023Updated 2 years ago
- NoC based MPSoC☆11Jul 17, 2014Updated 11 years ago
- Translated SpinalHDL-Doc(v1.7.2) into Chinese☆56Jun 11, 2023Updated 2 years ago
- a cyclic redundancy check(one kind of Error Correcting Code) software(MATLAB) and hardware(Verilog HDL) implementation.☆11Dec 14, 2019Updated 6 years ago
- This project is made to generate Polar decoders (unrolled decoders).☆15May 31, 2025Updated 9 months ago
- My graduation project.☆13Oct 12, 2023Updated 2 years ago
- A lightweight Ethernet MAC Controller IP for FPGA prototyping☆14Oct 19, 2020Updated 5 years ago
- RFNoC out-of-tree module for a channelizer☆16Mar 14, 2018Updated 8 years ago
- A Scalable BFS Accelerator on FPGA-HBM Platform☆13Jul 30, 2021Updated 4 years ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆63Dec 15, 2025Updated 3 months ago
- 通过SPI协议实现FPGA multiboot在线升级功能☆13May 17, 2018Updated 7 years ago
- This GitHub repo contains the artifact for CPElide, which appears at MICRO '24☆15Sep 7, 2024Updated last year
- 医疗相关数据分析、医疗问诊系统开发 随着移动互联网、云计算、大数据等技术的应用与发展，互联网再次成为社会和业界关注的热点☆13Oct 13, 2020Updated 5 years ago
- Paper implementation for "End-to-end Trained CNN Encoder-Decoder Networks for Image Steganography"☆15Jan 27, 2020Updated 6 years ago
- Example applications for UHD/RFNoC☆19Mar 8, 2022Updated 4 years ago
- A minimum configuration for Neovim targeting SystemVerilog that provides configuration for plugin management, a language server, tree-sit…☆25May 27, 2024Updated last year
- FPGA implementation of a CDR targeting a Xilinx Kintex-7 for data rates up to 250 MHz☆19Nov 15, 2021Updated 4 years ago
- Docker Development Environment for SpinalHDL☆20Aug 8, 2024Updated last year
- DOA 估计和自适应波束形成☆14Jun 17, 2019Updated 6 years ago
- A SytemVerilog implementation of Cyclic Redundancy Check runs at up to Terabits per second☆19Oct 23, 2023Updated 2 years ago
- Detect memory access patterns of parallel applications☆20Feb 7, 2019Updated 7 years ago
- This repository contains the code for this paper: Chiplet-Gym: An RL-based Optimization Framework for Chiplet-based AI Accelerator☆22Sep 28, 2024Updated last year
- The codes reproduce the research of our work in our JSTSP paper "An Iterative BP-CNN Architecture for Channel Decoding under Correlated N…☆70May 24, 2020Updated 5 years ago
- 利用轨道六根数画出卫星的飞行轨迹，来自于低轨卫星项目☆19Jul 27, 2020Updated 5 years ago
- polar codes,decoder，LSTM☆16Nov 28, 2018Updated 7 years ago
- 5G NR LDPC MATLAB implementation☆32May 31, 2024Updated last year
- Chart Egnine 心电图☆34Mar 1, 2017Updated 9 years ago
- 高等数值分析-资料☆18Jan 7, 2020Updated 6 years ago
- Chisel Things for OFDM☆32Jul 1, 2020Updated 5 years ago