Alternatives and similar repositories for JumpStart

Users that are interested in JumpStart are comparing it to the libraries listed below

• ARM-software / tarmac-trace-utilities
  Tools for analyzing and browsing Tarmac instruction traces.
  ☆79Updated 3 weeks ago
• quic / qbox
  Qbox
  ☆70Updated this week
• zero-day-labs / riscv-iommu-demo
  RISC-V IOMMU Demo (Linux & Bao)
  ☆23Updated last year
• riscv-non-isa / tg-nexus-trace
  RISC-V Nexus Trace TG documentation and reference code
  ☆54Updated 10 months ago
• chipsalliance / caliptra-rtl
  HW Design Collateral for Caliptra RoT IP
  ☆115Updated this week
• riscvarchive / security
  RISC-V Security HC admin repo
  ☆18Updated 10 months ago
• riscvarchive / riscv-eabi-spec
  Proposal for new Embedded ABI (EABI) for use in embedded RISC-V systems.
  ☆27Updated 4 years ago
• hsa-ees / paranut
  The ParaNut Processor - Highly Parallel and More Than Just a CPU Core
  ☆36Updated 2 years ago
• riscvarchive / riscv-CMOs
  ☆89Updated 2 months ago
• Xilinx / systemctlm-cosim-demo
  QEMU libsystemctlm-soc co-simulation demos.
  ☆156Updated 5 months ago
• lewiz-support / LMAC_CORE2
  LeWiz Communications Ethernet MAC Core2 10G/5G/2.5G/1G
  ☆40Updated 2 years ago
• zero-day-labs / riscv-aia
  AIA IP compliant with the RISC-V AIA spec
  ☆45Updated 9 months ago
• riscv-non-isa / riscv-iommu
  RISC-V IOMMU Specification
  ☆139Updated last week
• vherdt / riscv-vp
  RISC-V Virtual Prototype
  ☆44Updated 4 years ago
• josecm / rocket-chip
  Rocket Chip Generator
  ☆13Updated 4 years ago
• semidynamics / OpenVectorInterface
  Home of the specification to connect SemiDynamic's RISC-V cores to your own RISC-V Vector Unit
  ☆37Updated 3 years ago
• chipsalliance / omnixtend
  OmniXtend cache coherence protocol
  ☆82Updated 5 months ago
• texane / vpcie
  implement PCIE devices using C or VHDL and test them against a QEMU virtualized architecture
  ☆107Updated 7 years ago
• josecm / riscv-hyp-tests
  A bare-metal application to test specific features of the risc-v hypervisor extension
  ☆42Updated last year
• riscv / riscv-aia
  ☆96Updated 2 months ago
• tenstorrent / whisper
  ☆63Updated 3 weeks ago
• westerndigitalcorporation / swerv_eh1_fpga
  FPGA reference design for the the Swerv EH1 Core
  ☆72Updated 5 years ago
• antmicro / rowhammer-tester
  ☆71Updated 2 weeks ago
• zero-day-labs / riscv-iommu
  IOMMU IP compliant with the RISC-V IOMMU Specification v1.0
  ☆106Updated last month
• firesim / firechip
  Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator …
  ☆57Updated 5 years ago
• VerticalResearchGroup / microbench
  Extremely Simple Microbenchmarks
  ☆36Updated 7 years ago
• pulp-platform / clint
  RISC-V Core Local Interrupt Controller (CLINT)
  ☆29Updated last week
• intel / pfr-wilson-city
  ☆24Updated last month
• ppeetteerrs / gem5-RISC-V-FS-Linux
  Repository containing the guide and code for booting RISC-V full system linux using gem5.
  ☆55Updated 4 years ago
• wyvernSemi / pcievhost
  PCIe (1.0a to 2.0) Virtual Root Complex model for Verilog, with Endpoint capabilities
  ☆125Updated 2 weeks ago