Generate bitstream from FPGA assembly.
☆30Oct 27, 2026Updated last week
Alternatives and similar repositories for fpga-assembler
Users that are interested in fpga-assembler are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- generate C++ reader/writer from XSD schema☆10Oct 12, 2026Updated 3 weeks ago
- PCIe stack written in Amaranth.☆18Apr 27, 2026Updated 6 months ago
- ☆12Jun 4, 2021Updated 5 years ago
- pcie datalink layer implementation in verilog/systemverilog☆20Sep 10, 2026Updated last month
- LunaPnR is a place and router for integrated circuits☆48Feb 11, 2026Updated 8 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Project aimed at implementing floating point operators using the DSP48E1 slice.☆31Mar 29, 2013Updated 13 years ago
- Blazingly fast, modern C++ API using coroutines for efficient RTL verification and co-simulation via the VPI interface☆17Sep 9, 2026Updated last month
- Python interface to FPGA interchange format☆41Oct 19, 2022Updated 4 years ago
- ☆16Jul 10, 2020Updated 6 years ago
- Compilation of material properties at cryogenic temperatures for use in design and testing of cryogenic systems.☆14Sep 25, 2026Updated last month
- A Python to VHDL compiler☆18Apr 28, 2025Updated last year
- Phase Noise Analyzer (pna_qt) - A C++/Qt desktop application for visualizing and analyzing phase noise data from CSV files. Features inte…☆26May 24, 2025Updated last year
- Project X-Ray Database: XC7 Series☆80Dec 14, 2021Updated 4 years ago
- Use amaranth-to-litex to simply import Amaranth code into a Litex project.☆15Apr 22, 2024Updated 2 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Stencil with Optimized Dataflow Architecture☆12Feb 27, 2024Updated 2 years ago
- a project to check the FOSS synthesizers against vendors EDA tools☆12Sep 26, 2020Updated 6 years ago
- EEZ BB3+ MCU in CM5 form factor☆16Sep 18, 2026Updated last month
- Python/C/RTL cosimulation with Xilinx's xsim simulator☆80Jul 14, 2026Updated 3 months ago
- A template project for the ULX3S ECP5 FPGA board using only Open Source Software☆14Nov 11, 2018Updated 7 years ago
- Opensource DDR4 Controller☆18Sep 23, 2026Updated last month
- Open Source Silicon Development Testing Unit using JTAG☆15Apr 25, 2026Updated 6 months ago
- User-friendly explanation of Yosys options☆114Sep 25, 2021Updated 5 years ago
- Cross EDA Abstraction and Automation☆45Updated this week
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Apio package with selected binaries from the YosysHQ/oss-cad-suite project☆11Updated this week
- nMigen examples for the ULX3S board☆12May 5, 2022Updated 4 years ago
- XC2064 bitstream documentation☆19Sep 24, 2018Updated 8 years ago
- FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC☆60Feb 3, 2023Updated 3 years ago
- A bit-serial CPU☆20Sep 29, 2019Updated 7 years ago
- The Elgato Cam Link 4K, rebuilt with open-source LiteX gateware and bare-metal FX3 firmware.☆28Oct 12, 2026Updated 3 weeks ago
- ☆27Oct 19, 2026Updated 2 weeks ago
- Tool for graphically viewing FPGA bitstream files and their connection to FASM features.☆19Apr 6, 2022Updated 4 years ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆23Oct 24, 2023Updated 3 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Custom Standard Cell Library for GF180MCU process node on open PDK.☆13Oct 11, 2026Updated 3 weeks ago
- Fast and exact Wigner transforms☆10Jul 8, 2025Updated last year
- VDMA framebuffer driver for LVDS display☆14Mar 23, 2017Updated 9 years ago
- a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface☆31Dec 6, 2021Updated 4 years ago
- Projects for the ECPiX-5 - a ECP5 FPGA board.☆15Jul 5, 2020Updated 6 years ago
- Bitfiltrator: A general approach for reverse-engineering Xilinx bitstream formats☆60Apr 8, 2023Updated 3 years ago
- Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.☆91Feb 9, 2022Updated 4 years ago