andrewandrepowell / zybo_petalinuxView external linksLinks
Small projects intended to run on the Digilent Zybo development board, utilizing PetaLinux on the Zynq's ARM processor.
☆23Aug 19, 2016Updated 9 years ago
Alternatives and similar repositories for zybo_petalinux
Users that are interested in zybo_petalinux are comparing it to the libraries listed below
Sorting:
- Demonstration of a video processing design for the Digilent Zybo, using Web Camera for input and VGA interface for output.☆26Aug 28, 2016Updated 9 years ago
- A series of examples on zybo board for my blog tutorials.☆11Jul 17, 2016Updated 9 years ago
- A complete Linux project for the ZYBO. This project helps me during my first steps with embedded Linux. You can find anything necessary t…☆13Oct 8, 2020Updated 5 years ago
- Memory-mapped VGA display for Xilinx/Zynq/Zedboard, with demo code for using it.☆15Feb 26, 2018Updated 7 years ago
- ☆24Nov 3, 2016Updated 9 years ago
- AXI memory-mapped VGA module originally designed for the Avent Zedboard☆16Aug 2, 2016Updated 9 years ago
- MIDI synthesizer written in VHDL☆13Apr 3, 2012Updated 13 years ago
- ☆27Mar 29, 2018Updated 7 years ago
- Board files for building PYNQ linux for Zybo☆14Mar 30, 2019Updated 6 years ago
- A memory mapped VGA controller for ZedBoard☆12Feb 20, 2018Updated 7 years ago
- ☆14Mar 13, 2023Updated 2 years ago
- A parameterizable Vivado HLS project (C/C++) that implements a master and slave AXI-Stream to AXI-Memory-Mapped data mover (AXI-S default…☆16Aug 29, 2018Updated 7 years ago
- JESD204B core for Migen/MiSoC☆35May 5, 2021Updated 4 years ago
- Display ov7670 camera video on VGA monitors through Video DMA on ZedBoard☆19Jun 20, 2017Updated 8 years ago
- IP Cores that can be used within Vivado☆27May 18, 2021Updated 4 years ago
- ☆56Sep 26, 2022Updated 3 years ago
- Implementation of Sobel Filter in Verilog☆25Mar 10, 2017Updated 8 years ago
- ☆31Aug 21, 2025Updated 5 months ago
- Visualization of multiple tandem mass spectrometry data☆10Jun 15, 2020Updated 5 years ago
- HDMI Out VHDL code for 7-series Xilinx FPGAs☆63Sep 3, 2022Updated 3 years ago
- ☆32Mar 12, 2021Updated 4 years ago
- Design to connect Lattice Ultraplus FPGA to LH154Q01 Display☆28Jul 25, 2018Updated 7 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆116Jun 24, 2017Updated 8 years ago
- OpenCL Demos for Xilinx FPGAs☆31Dec 7, 2015Updated 10 years ago
- Semi-private RTL development upstream of OpenCPI - this is *not* the OpenCPI repo!☆25Oct 19, 2016Updated 9 years ago
- Verilog Repository for GIT☆35May 4, 2021Updated 4 years ago
- mirror of https://git.elphel.com/Elphel/x393_sata☆34May 12, 2020Updated 5 years ago
- Simulator of pic32 microcontroller, based on OVPsim☆16Jan 17, 2015Updated 11 years ago
- Simplicity SDK for Zephyr☆17Updated this week
- Transfer waveforms from Tektronix Oscilloscopes using the High-Speed Interface☆12Jan 19, 2026Updated 3 weeks ago
- to study xilinx fpga using Zybo Z7-20 board☆14Mar 13, 2024Updated last year
- Wishbone to AXI bridge (VHDL)☆44Aug 29, 2019Updated 6 years ago
- PPT for Fine tuning☆11Apr 22, 2018Updated 7 years ago
- VHDL design for rotary encoder. Can be used accessed via digital signals or AXI interface.☆13Mar 24, 2017Updated 8 years ago
- VHDL implementation of an Atari 2600☆12Sep 26, 2017Updated 8 years ago
- A PCB based business card using open hardware and free software☆11Sep 10, 2024Updated last year
- ☆40Jan 23, 2024Updated 2 years ago
- ☆11Nov 13, 2022Updated 3 years ago
- PC based on 65816☆16Jul 9, 2022Updated 3 years ago