Alternatives and similar repositories for cpelide-micro24-artifact

Users that are interested in cpelide-micro24-artifact are comparing it to the libraries listed below

• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆44Updated 3 years ago
• SET-Scheduling-Project / GEMINI-HPCA2024
  Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
  ☆105Updated 7 months ago
• casys-kaist / mNPUsim
  mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)
  ☆66Updated last month
• Zhaoshixin-sky / CIM-MLC
  [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators
  ☆48Updated last year
• ConvolutedDog / HyFiSS
  HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs
  ☆38Updated 11 months ago
• he-actlab / planaria.code
  ☆29Updated 4 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆96Updated last year
• SET-Scheduling-Project / SET-ISCA2023
  The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.
  ☆81Updated 8 months ago
• Accelergy-Project / accelergy-timeloop-infrastructure
  Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop
  ☆59Updated last month
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆147Updated 5 months ago
• tsinghua-ideal / spada-sim
  The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow
  ☆42Updated 2 years ago
• PolyArch / dsa-framework
  Release of stream-specialization software/hardware stack.
  ☆119Updated 2 years ago
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆83Updated 2 years ago
• scale-snu / attacc_simulator
  ☆112Updated last year
• pku-liang / TENET
  An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…
  ☆87Updated last year
• leesou / H2-LLM-ISCA-2025
  H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference
  ☆76Updated 7 months ago
• UVA-LavaLab / PIMeval-PIMbench
  PIMeval simulator and PIMbench suite
  ☆38Updated last week
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆70Updated 3 weeks ago
• georgia-tech-synergy-lab / SIGMA
  RTL implementation of Flex-DPE.
  ☆115Updated 5 years ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆65Updated 4 years ago
• Aayush-Ankit / puma-simulator
  [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…
  ☆68Updated 2 years ago
• sharc-lab / FlowGNN
  A dataflow architecture for universal graph neural network inference via multi-queue streaming.
  ☆73Updated 2 years ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆72Updated last year
• sunxt99 / PIMCOMP-NN
  ☆71Updated 9 months ago
• Systems-ShiftLab / MultiPIM
  MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator
  ☆56Updated 4 years ago
• UCLA-VAST / Serpens
  Serpens is an HBM FPGA accelerator for SpMV
  ☆22Updated last year
• casys-kaist / NeuPIMs
  NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing
  ☆100Updated last year
• ucb-bar / MoCA
  ☆28Updated 2 years ago
• wangxy-2000 / pimsim-nn
  ☆58Updated last year
• Yinxiao-Feng / chiplet-network-sim
  ☆49Updated 5 months ago