gmish27 / CPUonFPGA
It's a basic computer designed using VERILOG on XILINX FPGA architecture.
☆16Updated 7 years ago
Alternatives and similar repositories for CPUonFPGA:
Users that are interested in CPUonFPGA are comparing it to the libraries listed below
- Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog☆79Updated 5 years ago
- This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone be…☆77Updated 4 years ago
- A very primitive but hopefully self-educational CPU in Verilog☆141Updated 9 years ago
- An open source CPU design and verification platform for academia☆93Updated 4 years ago
- Exercises of the FPGA Prototyping By Verilog Examples book by Pong P. Chu☆20Updated 6 years ago
- A simple 8-bit computer build in Verilog.☆49Updated 4 months ago
- Pipelined DCPU-16 Verilog Implementation☆42Updated 12 years ago
- Parallel Array of Simple Cores. Multicore processor.☆94Updated 5 years ago
- Collection of hardware description languages writings and code snippets☆27Updated 9 years ago
- OpenSPARC-based SoC☆61Updated 10 years ago
- An attempt at a small Verilog implementation of the original Apple 1 on an FPGA☆139Updated 8 months ago
- Source code to accompany https://timetoexplore.net☆62Updated 4 years ago
- Example using DDR2 memory and MIG IP on the Nexys 4 DDR / Nexys A7 FPGA Trainer☆28Updated 2 years ago
- FPGA implementation of the 8051 Microcontroller (Verilog)☆47Updated 10 years ago
- A Verilog RTL model of a simple 8-bit RISC processor☆12Updated 6 years ago
- IBM PC Compatible SoC for a commercially available FPGA board☆68Updated 8 years ago
- ☆10Updated 7 years ago
- Verilog modules required to get the OV7670 camera working☆65Updated 6 years ago
- Design and implementation of a complete ARM based CPU.☆15Updated 6 years ago
- Verilog implementation of multi-stage 32-bit RISC-V processor☆82Updated 4 years ago
- Tools for FPGA development.☆44Updated last year
- ☆37Updated 3 years ago
- A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems☆43Updated 2 years ago
- Regression test suite for Icarus Verilog. (OBSOLETE)☆116Updated last year
- FPGA USB 1.1 Low-Speed Implementation☆33Updated 6 years ago
- ☆13Updated last month
- A 32-bit MIPS processor used Altera Quartus II with Verilog.☆26Updated 6 years ago
- 65C02 microprocessor in verilog, small size,reduced cycle count, asynchronous interface☆71Updated last year
- openMSP430 CPU core (from OpenCores)☆22Updated 2 years ago