emard / apple2fpga
port of Stephen A. Edwards apple2fpga to ULX3S
☆13Updated 7 months ago
Related projects ⓘ
Alternatives and complementary repositories for apple2fpga
- TI-99/4A FPGA implementation for the Icestorm toolchain☆15Updated 11 months ago
- A complete 65C02 computer with VGA output on a Lattice Ultra Plus FPGA☆27Updated 5 years ago
- Constraints file and Verilog demo code for the Pano Logic Zero Client G2☆16Updated 5 years ago
- QQSPI Pmod-compatible 32MB PSRAM module☆14Updated last year
- DVI PMOD adapter (HDMI connector)☆28Updated 3 years ago
- A highly-configurable and compact variant of the ZPU processor core☆34Updated 9 years ago
- ice40 UltraPlus demos☆23Updated 4 years ago
- KiCad design for a minimig compatible board for the QM_XC7A100T_DDR3 board.☆20Updated last year
- "Designing Video Game Hardware in Verilog" in iCE40HX8K Breakout Board.☆18Updated 4 years ago
- A System Verilog/FPGA implementation of the Gigatron project.☆16Updated 6 years ago
- ☆73Updated last month
- Retro computing on the Ulx3s ECP5 FPGA board☆24Updated 2 years ago
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆34Updated last year
- crap-o-scope scope implementation for icestick☆20Updated 6 years ago
- Port of Brian Bennet's NES Emulator for the second generation Panologic thin client☆11Updated 2 years ago
- Spins of Grant Searle's MultiComp project on various hardware☆69Updated last year
- Simple fixed-cycle SDRAM Controller☆25Updated 4 years ago
- Quickstart binaries for flashing ULX3S to factory-default state☆25Updated 2 years ago
- x86 core for FleaFPGA Ohm board☆13Updated 6 years ago
- XT-like PC written in SystemVerilog☆13Updated last year
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆37Updated 2 years ago
- PCXT by spark2k06 deMiSTified☆18Updated 7 months ago
- Multicomp Z80 CP/M implementation for the Ice40 (myStorm BlackIce)☆15Updated 6 years ago
- ☆15Updated 2 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.