Alternatives and similar repositories for bigassm:

Users that are interested in bigassm are comparing it to the libraries listed below

• riscv / riscv-j-extension
  Working Draft of the RISC-V J Extension Specification
  ☆173Updated this week
• shacron / sled
  Sled System Emulator
  ☆28Updated 2 months ago
• popovicu / linux-no-mmu-userspace-example
  ☆39Updated last year
• riscv-non-isa / riscv-uefi
  ☆28Updated 2 years ago
• OpenPOWERFoundation / a2i
  The A2I core was used as the general purpose processor for BlueGene/Q, the successor to BlueGene/L and BlueGene/P supercomputers
  ☆40Updated 2 years ago
• animetosho / jit_smc_test
  Test self-modifying code behaviour on processors for single-use JIT functions
  ☆51Updated 4 years ago
• redstar / llvm-m88k
  LLVM backend for m88k architecture
  ☆49Updated this week
• brouhaha / glacial
  Glacial - microcoded RISC-V core designed for low FPGA resource utilization
  ☆83Updated 5 years ago
• sifive / freedom-devicetree-tools
  A linker script generator for SiFive's Freedom platform
  ☆31Updated 3 years ago
• brucehoult / rvv_example
  Simple demonstration of using the RISC-V Vector extension
  ☆39Updated 9 months ago
• intel / intel-sdsi
  ☆48Updated 2 months ago
• riscv-non-isa / riscv-device-tree-doc
  RISC-V Specific Device Tree Documentation
  ☆42Updated 6 months ago
• sifive / wake
  The SiFive wake build tool
  ☆87Updated last week
• hitohira / yokyo
  ☆16Updated last year
• MPACT-ORG / llvm-project
  The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github…
  ☆31Updated last month
• andportnoy / riscv-disassembler
  A minimal RISC-V RV32I disassembler
  ☆55Updated 3 years ago
• betrusted-io / betrusted-ec
  Betrusted embedded controller (UP5K)
  ☆45Updated last year
• CTSRD-CHERI / Toooba
  RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT
  ☆25Updated this week
• michaeljclark / riscv-meta
  RISC-V Instruction Set Metadata
  ☆41Updated 6 years ago
• openhwgroup / corev-gcc
  ☆22Updated 6 months ago
• sifive / freedom-metal
  Bare Metal Compatibility Library for the Freedom Platform
  ☆155Updated last year
• noteed / riscv-hello-asm
  Bare metal RISC-V assembly hello world
  ☆54Updated 3 years ago
• ria-jit / ria-jit
  Lightweight and performant dynamic binary translation for RISC–V code on x86–64
  ☆60Updated 3 years ago
• imihajlow / ccpu-cc
  A C11 compiler for the discrete logic computer
  ☆20Updated 9 months ago
• riscvarchive / riscv-zicond
  The ISA specification for the ZiCondOps extension.
  ☆19Updated 10 months ago
• echtzeit-dev / ez-clang
  C++ REPL for bare-metal embedded devices
  ☆25Updated last year
• gsmecher / minimax
  Minimax: a Compressed-First, Microcoded RISC-V CPU
  ☆208Updated 9 months ago
• riscv / configuration-structure
  RISC-V Configuration Structure
  ☆37Updated 3 months ago
• atrosinenko / memtest86-plus-riscv
  Port of original MemTest86+ v5.1 to other architectures (RISC-V for now)
  ☆15Updated 5 years ago
• CHERIoT-Platform / cheriot-sail
  Sail code model of the CHERIoT ISA
  ☆34Updated 3 weeks ago