joeferner / fpga-spi
Simple SPI interface for FPGAs
☆13Updated 10 years ago
Related projects ⓘ
Alternatives and complementary repositories for fpga-spi
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆58Updated 5 years ago
- Design to connect Lattice Ultraplus FPGA to LH154Q01 Display☆28Updated 6 years ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆39Updated 3 years ago
- Example designs for the Spartan7 "S7 Mini" FPGA board☆27Updated 5 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆82Updated 6 years ago
- Small (Q)SPI flash memory programmer in Verilog☆55Updated 2 years ago
- FPGA USB 1.1 Low-Speed Implementation☆33Updated 6 years ago
- Quickstart binaries for flashing ULX3S to factory-default state☆25Updated 2 years ago
- Minimal DVI / HDMI Framebuffer☆75Updated 4 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆36Updated 6 months ago
- Portable HyperRAM controller☆48Updated 3 weeks ago
- Wishbone interconnect utilities☆36Updated 5 months ago
- Recreating an NES in verilog☆13Updated 2 months ago
- Simple USB to PWM Peripheral using Lattice iCEStick (Hackaday demo)☆22Updated 4 years ago
- SDRAM controller with multiple wishbone slave ports☆28Updated 6 years ago
- nMigen examples for the ULX3S board☆15Updated 3 years ago
- crap-o-scope scope implementation for icestick☆20Updated 6 years ago
- ice40 UltraPlus demos☆23Updated 4 years ago
- Xilinx 7-series FTDI-FPGA interface through JTAG with 125 us roundtrip latency☆19Updated 5 years ago
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC☆54Updated last year
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆48Updated last year
- ESP8266 powered Xilinx Virtual Cable - Xilinx WiFi JTAG!☆22Updated 3 years ago
- SDRAM controller optimized to a memory bandwidth of 316MB/s☆25Updated 3 years ago
- Sending UDP packets out over a Gigabit PHY with an FPGA.☆42Updated 8 years ago
- mystorm sram test☆26Updated 7 years ago
- Upduino v2 with the ice40 up5k FPGA demos☆78Updated last year
- KiCad Library to make it easy to create both host boards and expansion boards and which are compatible with the Digilent "PMOD" specifica…☆36Updated 3 years ago
- Using the TinyFPGA BX USB code in user designs☆49Updated 5 years ago
- Using VexRiscv without installing Scala☆36Updated 3 years ago