Alternatives and similar repositories for crashsheets:

Users that are interested in crashsheets are comparing it to the libraries listed below

• MJoergen / formal
  Playing around with Formal Verification of Verilog and VHDL
  ☆54Updated 3 years ago
• ATaylorCEngFIET / Mastering-MicroBlaze
  Slides and lab instructions for the mastering MicroBlaze session
  ☆34Updated 2 years ago
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆32Updated this week
• hdl-registers / hdl-registers
  An open-source HDL register code generator fast enough to run in real time.
  ☆40Updated this week
• nematoli / SPI-FPGA-VHDL
  SPI Master and Slave components to be used in all of FPGAs, written in VHDL.
  ☆34Updated 4 years ago
• jakubcabal / uart-for-fpga
  Simple UART controller for FPGA written in VHDL
  ☆93Updated 3 years ago
• rodrigomelo9 / FOSS-for-FPGAs
  A getting started presentation (with examples) about how to use FLOSS for FPGA development.
  ☆35Updated last year
• ATaylorCEngFIET / perfecting_petalinux
  ☆14Updated 2 years ago
• hdl-modules / hdl-modules
  A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
  ☆144Updated this week
• paulscherrerinstitute / psi_fpga_all
  Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.
  ☆28Updated 9 months ago
• Toroid-io / vcd2wavedrom
  Python script to transform a VCD file to wavedrom format
  ☆75Updated 2 years ago
• Architech-Silica / Designing-a-Custom-AXI-Slave-Peripheral
  A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools
  ☆40Updated 6 years ago
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆38Updated 8 months ago
• gsmecher / pyxsi
  Python/C/RTL cosimulation with Xilinx's xsim simulator
  ☆65Updated 4 months ago
• missinglinkelectronics / fpga-vbs
  Vivado build system
  ☆66Updated last month
• FPHDL / fphdl
  VHDL-2008 Support Library
  ☆57Updated 8 years ago
• HDLForBeginners / Examples
  ☆84Updated last year
• robertofem / CycloneVSoC-examples
  Examples using the Cyclone V SoC chip
  ☆106Updated 5 years ago
• Fraunhofer-IMS / airisc_core_complex
  Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors.
  ☆83Updated last year
• ATaylorCEngFIET / introduction_to_vivado
  ☆18Updated last year
• tmeissner / psl_with_ghdl
  Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)
  ☆65Updated 2 years ago
• OSVVM / Documentation
  OSVVM Documentation
  ☆32Updated last month
• suoto / fpga_cores
  ☆32Updated last year
• ATaylorCEngFIET / Professional-PYNQ
  ☆12Updated last year
• efard / DSPHDL
  ☆40Updated 11 months ago
• gtaylormb / ultra96v2_imx219_to_displayport
  Raspberry Pi v2 camera (IMX219) to DisplayPort of Ultra96-V2 board through PL
  ☆69Updated 2 years ago
• ghdl / ghdl-cosim
  Documentation with code examples about interfacing VHDL with foreign languages and tools through GHDL
  ☆47Updated this week
• fransschreuder / xpm_vhdl
  A translation of the Xilinx XPM library to VHDL for simulation purposes
  ☆51Updated 4 months ago
• Future-Electronics-Design-Center / Creative-Eval-Board
  Future Electronics Creative Eval Board featuring a Microsemi SmartFusion2 or IGLOO2 FPGA
  ☆16Updated 5 years ago
• paulscherrerinstitute / psi_fix
  Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)
  ☆22Updated 6 months ago