Alternatives and similar repositories for USTC-NSCSCC

Users that are interested in USTC-NSCSCC are comparing it to the libraries listed below

• xiazhuo / nscc2022_personal
  NSCSCC2022龙芯杯个人赛，MIPS32，59MHz经典五级流水线架构，易于初学者阅读（计算机组成原理，自己动手写CPU）
  ☆77Updated last year
• Azalea8 / riscv_cpu
  riscv指令集，单周期以及五级流水线CPU
  ☆79Updated 6 months ago
• fluctlight001 / nscscc2022_single_tools
  龙芯杯个人赛工具包（适用于个人赛的golden_trace工具）
  ☆61Updated last year
• Tan-YiFan / DigitalLogic-Autumn2020
  复旦大学 数字逻辑与部件设计实验 2020秋
  ☆51Updated 3 years ago
• ykykzq / SimpleCPU
  基于LoongArch32/MIPS32指令集的七级流水线CPU。2023届龙芯杯（NSCSCC）个人赛参赛作品。
  ☆27Updated 3 months ago
• loongson-education / nscscc-wiki
  NSCSCC 信息整合
  ☆251Updated 4 years ago
• MengYueqi / HIT_CPU_verilog
  哈工大2023处理器设计与计算机体系结构实验
  ☆19Updated 11 months ago
• fluctlight001 / cpu_for_nscscc2022_single
  2022年龙芯杯个人赛 单发射110M（含icache）
  ☆48Updated 2 years ago
• y0fy / CO-lab-material-CQU
  重庆大学计算机组成原理、硬件综合设计实验材料
  ☆38Updated 4 years ago
• lvyufeng / step_into_mips
  一步一步写MIPS CPU
  ☆821Updated 4 years ago
• SakuraILU / NJU-ICS2021-PA
  NJU ICS课程的PA实验，非常棒的一个大项目，受益匪浅！一栈式打通虚拟机NEMU、操作系统NLiteOS和应用层
  ☆48Updated 3 years ago
• SocialistDalao / UltraMIPS_NSCSCC
  UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.
  ☆139Updated last year
• NJU-ProjectN / nvboard
  NJU Virtual Board
  ☆285Updated 3 weeks ago
• shinezyy / micro-arch-training
  How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design
  ☆585Updated 11 months ago
• JiazhenZhao02091 / nju-ics2022
  南京大学2022春季pa
  ☆13Updated last year
• Googol2002 / NJU-ICS2021-PA
  2021年秋季学期 南京大学ICS课程 PA实验部分
  ☆126Updated 3 years ago
• qing-2 / CPU
  单周期 8指令 MIPS32CPU
  ☆91Updated 2 years ago
• Lyncien / RISC-V-32I
  体系结构课程实验：RISC-V 32I 流水线 CPU，实现37条指令，转发，冒险检测，Cache，分支预测器
  ☆84Updated 5 years ago
• renyangang / riscv-mcu
  This project utilizes the Digital circuit simulation software,to build a CPU that supports a simple instruction set and simple peripheral…
  ☆68Updated 3 months ago
• Silverster98 / bit_nscscc_suggestion
  为了更好地帮助后来的同学参加龙芯杯，草拟了这份建议，望对后来人有所帮助
  ☆126Updated 4 years ago
• Kristoff-starling / ProjectN-CPU
  Single Cycle and Pipeline CPU of RISC-V Architecture designed for Digital Design and Computer Organization Experiments 2021, NJU
  ☆13Updated 3 years ago
• OSCPU / ysyx-workbench
  ☆156Updated this week
• spokeyjoe / LoongArchCPU
  A LoongArch pipeline CPU. Project of Computer Architecture Lab @UCAS.
  ☆25Updated last year
• Corle-hyz / UCAS-COD-Lab
  中国科学院大学(UCAS)2020年春季学期计算机组成原理实验课作业
  ☆16Updated 3 years ago
• cquwei-cx / cpu20220108
  MIPS 57条指令五级流水线cpu (verilog实现+详细注释)
  ☆11Updated 3 years ago
• fluctlight001 / cpu_for_nscscc2020
  2020龙芯杯个人赛 简易双发射60M（含ibuffer）
  ☆40Updated 4 years ago
• 15947470421 / digital_IC_experiment
  我设计了一些数字集成电路的教学实验，供大家学习~
  ☆28Updated 6 months ago
• redlightASl / Notes
  ☆82Updated 2 weeks ago
• SinnLiu / CPU_Design_MIPS
  《CPU设计实战》学习记录及代码
  ☆12Updated last year
• wataru030-XIAOHEI / My-RISCV64-CORE-writing
  一生一芯 ， ysyx ， npc . the repo of the YSYX project . a riscv-64 CPU . writing .
  ☆29Updated 3 years ago