Large Language Model Inference Acceleration: A Comprehensive Hardware Perspective
☆20Jul 15, 2025Updated last year
Alternatives and similar repositories for LLM_Hardware_Survey
Users that are interested in LLM_Hardware_Survey are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- （Not actively updating）Vision Transformer Accelerator implemented in Vivado HLS for Xilinx FPGAs.☆26Dec 29, 2024Updated last year
- Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆63Sep 1, 2025Updated last year
- Codebase for layer wise N:M pruning pattern assignment for LLMs☆15Aug 5, 2025Updated last year
- QuardStar Tutorial is all you need !☆20Sep 11, 2024Updated 2 years ago
- Verilog-Based-NoC-Simulator☆12May 4, 2016Updated 10 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- 给NEMU移植Linux Kernel!☆23Jun 1, 2025Updated last year
- ☆26Apr 3, 2026Updated 5 months ago
- Build mini linux for your own RISC-V emulator!☆25Sep 11, 2024Updated 2 years ago
- DeepGate3 for ICCAD2024☆14May 26, 2025Updated last year
- Automatically exported from code.google.com/p/tpzsimul☆12Jul 7, 2015Updated 11 years ago
- This repository presents the source code for the paper "MILLION: Mastering Long-Context LLM Inference Via Outlier-Immunized KV Product Qu…☆26Sep 1, 2026Updated 2 weeks ago
- ☆19Jul 2, 2024Updated 2 years ago
- Reasoning LLMs optimized for Chisel code generation☆26Jun 19, 2025Updated last year
- ☆20May 8, 2012Updated 14 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions☆212Jun 25, 2020Updated 6 years ago
- GPGPU-Sim 中文注释版代码，包含 GPGPU-Sim 模拟器的最新版代码，经过中文注释，以帮助中文用户更好地理解和使用该模拟 器。☆30Dec 18, 2024Updated last year
- nscscc2024，HPU河南理工大学参赛作品，两仪处理器☆13Aug 24, 2024Updated 2 years ago
- ☆14Apr 8, 2025Updated last year
- A SystemC + DRAMSim2 simulator for exploring the SpMV hardware accelerator design space.☆15Nov 9, 2014Updated 11 years ago
- ☆12Aug 18, 2023Updated 3 years ago
- minimal code to access ps DDR from PL☆23Oct 18, 2019Updated 6 years ago
- Network on chip based neural network accelerator☆11Mar 25, 2021Updated 5 years ago
- SpecLLM: Exploring Generation and Review of VLSI Design Specification with Large Language Model☆17Jan 29, 2024Updated 2 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Implementation of Input Stationary, Weight Stationary and Output Stationary dataflow for given neural network on a tiled architecture☆10Apr 19, 2020Updated 6 years ago
- Official repository for "Attend to Not Attended: Structure-then-Detail Token Merging for Post-training DiT Acceleration", which has been …☆17Sep 29, 2025Updated 11 months ago
- ☆16Nov 22, 2022Updated 3 years ago
- Memorize-and-Generate: Towards Long-Term Consistency in Real-Time Video Generation☆19Mar 20, 2026Updated 5 months ago
- [DATE'25, ICCAD'25] An embedded FPGA-based LLM accelerator capable of supporting Llama2-7B☆202Jul 30, 2026Updated last month
- [NeurIPS 2023] Token-Scaled Logit Distillation for Ternary Weight Generative Language Models☆18Dec 6, 2023Updated 2 years ago
- 保存（原）东京工业大学IGP群的资料☆15Oct 10, 2024Updated last year
- [ICLR25] STBLLM: Breaking the 1-Bit Barrier with Structured Binary LLMs☆20Jun 3, 2025Updated last year
- 简单的未优化的SRT除法器☆13Jun 16, 2024Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Tutorial on how to use the PL to PS interrupt on the Zedboard☆27Jun 7, 2017Updated 9 years ago
- Repo for SpecEE: Accelerating Large Language Model Inference with Speculative Early Exiting (ISCA25)☆75Apr 25, 2025Updated last year
- ☆13Sep 12, 2025Updated last year
- Implementation of TAGE Branch Predictor - currently considered state of the art☆57Sep 6, 2014Updated 12 years ago
- ☆10Sep 26, 2024Updated last year
- ☆21Mar 9, 2026Updated 6 months ago
- A parametric RTL code generator of an efficient integer MxM Systolic Array implementation for Xilinx FPGAs.☆38Aug 28, 2025Updated last year