Alternatives and similar repositories for intro2PCBdesign

Users that are interested in intro2PCBdesign are comparing it to the libraries listed below

• mit-han-lab / bnn-icestick
  Binary Neural Network on IceStick FPGA.
  ☆54Updated 7 years ago
• wjc852456 / Neural-Networks-on-Silicon
  This is a collection of works on neural networks and neural accelerators.
  ☆41Updated 6 years ago
• max2ma / shiftNet
  ☆14Updated 6 years ago
• lgalke / torch-pruning
  Pruning methods for pytorch with an optimizer-like interface
  ☆15Updated 5 years ago
• jaygshah / Binary-Neural-Networks
  Implemented here a Binary Neural Network (BNN) achieving nearly state-of-art results but recorded a significant reduction in memory usage…
  ☆75Updated 4 years ago
• iwls2020-lsml-contest / iwls2020-lsml-contest
  ☆21Updated 3 years ago
• NVlabs / iccad2020-GPUgatesim
  ☆14Updated 5 years ago
• brianhill11 / FPGA-CNN
  This repo is for ECE44x (Fall2015-Spring2016)
  ☆20Updated 7 years ago
• cornell-zhang / facedetect-fpga
  ☆46Updated 5 years ago
• TadejMurovic / BNN_Deployment
  Part of paper: Massively Parallel Combinational Binary Neural Networks for Edge Processing
  ☆12Updated 6 years ago
• maltanar / qnn-inference-examples
  Jupyter notebook examples on image classification with quantized neural networks
  ☆71Updated 5 years ago
• AcrossV / Gated-XNOR
  Ternary Weights and Activations
  ☆25Updated 7 years ago
• nlbutts / tflite_zynq
  Example code and instructions on getting Tensorflow Lite running on a Xilinx Zynq
  ☆49Updated 8 years ago
• rwpenney / spfpm
  Package for performing fixed-point, arbitrary-precision arithmetic in Python.
  ☆66Updated last year
• EECS-NTNU / bismo
  BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing
  ☆149Updated 6 years ago
• fpgasystems / ZipML-PYNQ
  Linear model training using stochastic gradient descent (SGD) on PYNQ with full to low precision.
  ☆55Updated 8 years ago
• lukehsiao / ee_quals
  Resources and guide for preparing for Stanford's electrical engineering qualification exams.
  ☆24Updated 6 years ago
• RaviVijay / awesome-dl-hw-resources
  A curated list of awesome hardware/chip design resources for deep learning
  ☆55Updated 7 years ago
• RaviVijay / DeepLearningEE
  Collection of Papers and Trials on Deep Learning to aid EE design
  ☆45Updated 5 years ago
• da-steve101 / binary_connect_cifar
  An implementation of a BinaryConnect network for cifar10
  ☆11Updated 6 years ago
• awai54st / LUTNet
  ☆65Updated 5 years ago
• lite-david / comet
  RISC-V ISA based 32-bit processor written in HLS
  ☆16Updated 6 years ago
• Xilinx / PYNQ_Bootcamp
  PYNQ Bootcamp 2019-2024 teaching materials.
  ☆52Updated last year
• wvangansbeke / High-Level-Synthesis
  Convert C files into Verilog
  ☆20Updated 7 years ago
• WalkerLau / GPU-CNN
  Accelerate convolution neural network for face recognition using GPU
  ☆12Updated 5 years ago
• sjain-stanford / deep-route
  Training a deep FCN network in PyTorch to route circuit layouts
  ☆68Updated 3 years ago
• BertMoons / Comparing-CNN-Architectures
  A regularly updated comparison of CNN architectures in terms of accuracy, operations and model size
  ☆45Updated 7 years ago
• EEESlab / combinational-bnn
  System Verilog code describing a fully combinational binarized neural network.
  ☆34Updated 7 years ago
• tukl-msd / LSTM-PYNQ
  ☆28Updated 7 years ago
• FPGA4HEP / course_material
  ☆35Updated 6 years ago