Alternatives and similar repositories for FPGA-from-Zero-to-Hero:

Users that are interested in FPGA-from-Zero-to-Hero are comparing it to the libraries listed below

• mbaykenar / apis_anatolia
  "Mehmet Burak Aykenar" YouTube kanalında yayınlanan VHDL ve FPGA dersleri ile ilgili kodları içermektedir.
  ☆98Updated 9 months ago
• kartiksamtani / 100DaysOfRTL
  This is a passion project where I aim to explore the RTL design topics of my interest.
  ☆10Updated last month
• mbaykenar / mpw7_yonga_soc
  Yonga-MCU is a 32-bit RISCV-IMC instruction set compatible SoC design with peripherals like UART, SPI and I2C
  ☆17Updated 2 years ago
• muhammedkocaoglu / mystic_riscv64
  64-bit RISC-V processor
  ☆16Updated 2 years ago
• amradel2020 / vlsi_linkedin_index
  This repo provide an index of VLSI content creators and their materials
  ☆147Updated 7 months ago
• hdl-modules / hdl-modules
  A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
  ☆159Updated this week
• TUTEL-TUBITAK / TEKNOFEST_2023_Cip_Tasarim_Yarismasi
  Bu depo TEKNOFEST 2023 Çip Tasarım Yarışması'nda Analog Tasarım ve Sayısal İşlemci Tasarımı kategorilerinde çeşitli dosyaları paylaşmak i…
  ☆21Updated last year
• ItzzInfinity / 100-days-of-RTL
  Trying to get a new skill
  ☆21Updated 3 months ago
• kirbyydoge / kasirga_2023
  Kasırga Sayısal Görüntü İşleme Kategorisi Hızlandırıcı Tasarımı
  ☆12Updated last year
• rajdeep66 / edaBundle_whyRD
  opensource EDA tool flor VLSI design
  ☆32Updated last year
• yusfux / KASIRGA-GUN
  KASIRGA-GUN | RV32IMCX
  ☆12Updated 7 months ago
• AngeloJacobo / OpenLANE-Sky130-Physical-Design-Workshop
  Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
  ☆56Updated 2 years ago
• ARC-Lab-UF / sv-tutorial
  SystemVerilog Tutorial
  ☆138Updated 2 weeks ago
• kirbyydoge / kasirga_gok_2023
  Kasırga - Gök Sayısal İşlemci Kategorisi RISC-V İşlemci Tasarımı
  ☆14Updated last year
• hdl-registers / hdl-registers
  An open-source HDL register code generator fast enough to run in real time.
  ☆59Updated this week
• HDLForBeginners / Examples
  ☆90Updated last year
• hughbyrne10 / 100daysofRTL
  100 Days Of RTL is a personal challenge designed to help improve skills and knowledge in digital circuit design. The challenge involves c…
  ☆26Updated last year
• AngeloJacobo / FPGA_Book_Experiments
  My completed projects from "FPGA Prototyping by Verilog Examples" book by Pong P. Chu
  ☆125Updated 3 years ago
• D-curs-D / Inverter-design-and-analysis-using-sky130pdk
  Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools
  ☆109Updated 2 years ago
• iammituraj / pequeno_riscv
  Pequeno (PQR5) is a 5-stage pipelined in-order RISC-V CPU Core compliant with RV32I ISA.
  ☆62Updated 3 weeks ago
• Tooba12322 / RTL_Designs
  ☆12Updated 4 months ago
• lekgolo167 / enxor-logic-analyzer
  FPGA Logic Analyzer and GUI
  ☆123Updated 2 years ago
• arm-university / Introduction-to-SoC-Design-Education-Kit
  Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedd…
  ☆122Updated 8 months ago
• Kobzon86 / Convolutional-Neural-Network-using-SystemVerilog
  Synthesizable RTL-Based video stream Convolutional Neural Network ( non HLS )
  ☆58Updated 5 months ago
• efard / DSPHDL
  ☆41Updated last year
• muhammedkocaoglu / SystemVerilog-Tutorials
  SystemVerilog derslerinde yazdığım kodları içermektedir.
  ☆13Updated last year
• ATaylorCEngFIET / introduction_to_vivado
  ☆20Updated 2 years ago
• bmurmann / EE628
  EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)
  ☆152Updated last week
• arunkpv / vsd-hdp
  ☆16Updated 9 months ago
• Marco-Winzker / FPGA-FIR-Filter
  Lecture about FIR filter on an FPGA
  ☆12Updated 10 months ago