Alternatives and similar repositories for cadence-skill

Users that are interested in cadence-skill are comparing it to the libraries listed below

• uoyniXnaH / AXL-SKILL
  Cadence Allegro Skills.
  ☆51Updated 6 years ago
• unihd-cag / skillbridge
  A seamless python to Cadence Virtuoso Skill interface
  ☆239Updated 8 months ago
• ebecheto / Skill
  my cadence/virtuoso/icfb skill functions develloped over the years
  ☆143Updated 3 weeks ago
• lukeli17 / Allegro_Skill_ziliao
  Cadence Skill资料收集
  ☆25Updated 3 years ago
• unnir / CadenceSKILL-Python
  Inter Process Communication (IPC) between Python and Cadence Virtuoso
  ☆79Updated 8 years ago
• ananthchellappa / SKILL
  Cadence SKILL utilities that have boosted my productivity considerably for 10+ years.
  ☆50Updated last month
• MatthewLoveQUB / SKILL_Tools
  Utilities for working with Cadence's SKILL/SKILL++ including a unit testing framework.
  ☆44Updated 4 years ago
• cdsgit / cdsgit
  Cadence Virtuoso Git Integration written in SKILL++
  ☆158Updated 3 years ago
• curtisma / VirtuosoToolboxMatlab
  MATLAB toolbox for interfacing with the Cadence Virtuoso IC Design System
  ☆30Updated 8 years ago
• mfilmer / skill
  Useful Cadence skill scripts
  ☆20Updated 6 years ago
• muhammadaldacher / Analog-Design-of-Asynchronous-SAR-ADC
  This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) impl…
  ☆181Updated 11 months ago
• cdsdm / cdsdm
  Cadence Virtuoso Design Management System
  ☆36Updated 2 years ago
• KenKundert / psf_utils
  Read Spectre PSF files
  ☆69Updated 3 months ago
• cascode-labs / virtue
  A Python and SKILL Framework for Cadence Virtuoso
  ☆43Updated last year
• trilomix / GDS3D
  GDS3D is an application that can interpret so called IC layouts and render them in 3D. The program accepts standard GDSII files as input …
  ☆235Updated last year
• bmurmann / Book-on-gm-ID-design
  Ancillary Material for the book "Systematic Design of Analog CMOS Circuits"
  ☆164Updated 3 weeks ago
• Nubis-Communications / SignalIntegrity
  Python tools for signal integrity applications
  ☆160Updated this week
• muhammadaldacher / Analog-Design-of-1.9-GHz-PLL-system
  This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…
  ☆77Updated 2 years ago
• bmurmann / ADC-survey
  ADC Performance Survey (ISSCC & VLSI Circuit Symposium)
  ☆217Updated 2 months ago
• whh5118 / GTOpen
  几楼科技 Cadence Allegro开源项目
  ☆120Updated 5 years ago
• idea-fasoc / OpenFASOC
  Fully Open Source FASOC generators built on top of open-source EDA tools
  ☆296Updated last week
• xbwpc / EDA_FeatureColle
  A collection of license features from a varity of EDA vendors
  ☆77Updated 2 months ago
• efabless / openlane2
  The next generation of OpenLane, rewritten from scratch with a modular architecture
  ☆316Updated 8 months ago
• Gklkrshna / Phase-locked-loop-IC-design
  VSD workshop - Phase Locked Loop(PLL) IC Design
  ☆15Updated 4 years ago
• RTimothyEdwards / open_pdks
  PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open p…
  ☆367Updated last week
• muhammadaldacher / Analog-Design-of-LDO-with-PMOS-pass-device
  This project discusses the design procedure of a Low Dropout Voltage Regulator (LDO) circuit.
  ☆15Updated last year
• BinaryHackerLab / SynopsysMonoSlayer
  Synopsys License patcher
  ☆37Updated last year
• sscs-ose / sscs-chipathon-2024
  ☆83Updated 9 months ago
• bmurmann / EE628
  EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)
  ☆167Updated 2 months ago
• nandland / spi-slave
  SPI Slave for FPGA in Verilog and VHDL
  ☆214Updated last year