USB2 core for LiteX
☆12Sep 30, 2026Updated last month
Alternatives and similar repositories for liteusb
Users that are interested in liteusb are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Experimental USB2 HS/FS host primitives for FPGAs.☆12Oct 26, 2026Updated 2 weeks ago
- Use amaranth-to-litex to simply import Amaranth code into a Litex project.☆15Apr 22, 2024Updated 2 years ago
- PCIe Gen2/Gen3 analog mux 1:2☆15Jul 9, 2026Updated 4 months ago
- Small footprint and configurable NVMe core.☆21Nov 2, 2026Updated last week
- ☆18Nov 2, 2026Updated last week
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Experimental Lattice ECP5-driven Data Center Security Communication Module☆23Jul 22, 2024Updated 2 years ago
- A LiteX module implementing a USB UAC2 module with simple PDM in/out☆16Feb 16, 2022Updated 4 years ago
- A Python to VHDL compiler☆18Apr 28, 2025Updated last year
- FPGA mandelbrot accelerator via high speed/super speed USB☆14Apr 6, 2023Updated 3 years ago
- Public repository to host our Checker IP written in SVA that is ported to run on open-source Verilator.☆12Mar 31, 2023Updated 3 years ago
- 2-layer and 4-layer FPGA development board with ZYNQ 7010/7020 400-pin BGA.☆30Mar 30, 2026Updated 7 months ago
- ☆118Jan 22, 2023Updated 3 years ago
- USB virtual model in C++, co-simulating with Verilog, SystemVerilog and VHDL☆35Oct 15, 2024Updated 2 years ago
- Topaz Computer☆15Jul 15, 2026Updated 3 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Hardware Design/Visualization/Simulation/RTLGeneration Framework☆18Nov 3, 2026Updated last week
- Agentic KiCad PCB design workflow for SKiDL — architect, source, code, and verify circuits with AI agents.☆26Apr 8, 2026Updated 7 months ago
- The Elgato Cam Link 4K, rebuilt with open-source LiteX gateware and bare-metal FX3 firmware.☆29Nov 2, 2026Updated last week
- GsD style kicad Libraries☆10Apr 4, 2020Updated 6 years ago
- command line tool for frequent amaranth HDL tasks (generate sources, show design)☆17Dec 27, 2021Updated 4 years ago
- ☆21Jun 10, 2026Updated 5 months ago
- Verified visual schematics for all SKY130 Cells☆13Oct 6, 2026Updated last month
- Self-contained 3dfx Voodoo 1 (SST-1) demos on Mac / Linux☆11Apr 17, 2025Updated last year
- Generate clearance rules for KiCAD by a human-readable easy-to-use table.☆17Nov 4, 2026Updated last week
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A low-level hierarchical netlist assembler for FPGAs☆13Jul 26, 2021Updated 5 years ago
- Experimental open-source LiteX SoC for GameBub Rev4: VexRiscv, LCD and ESP32 overlay, SRAM/SDRAM, audio and vibration testers. Migen/Lite…☆20Oct 21, 2026Updated 3 weeks ago
- Open source Logic Analyzer based on LiteX SoC☆27Apr 12, 2025Updated last year
- Some assorted examples of nmigen designs☆19Nov 5, 2023Updated 3 years ago
- Use an MPSSE FTDI device as a JTAG interface in Quartus tools☆33Feb 22, 2024Updated 2 years ago
- Kiri Docker project to run Kiri Revision Inspector inside a Docker container☆19Apr 7, 2025Updated last year
- Advanced Integrated Circuits 2026☆17Oct 9, 2026Updated last month
- CRUVI Standard Specifications☆21May 6, 2024Updated 2 years ago
- 1G‑style Ethernet PHY PCS block in Sky130 using OpenLane☆18Feb 15, 2026Updated 8 months ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- KISCV, a KISS principle riscv32i CPU☆28Jan 11, 2025Updated last year
- assorted library of utility cores for amaranth HDL☆103Sep 17, 2024Updated 2 years ago
- Artix7 SOM☆22Sep 9, 2024Updated 2 years ago
- C++HDL (Hardware Description Language)☆58Updated this week
- Hardware transactions library for Amaranth☆32Updated this week
- [Moved to Codeberg] Another size-optimized RISC-V CPU for your consideration.☆61May 10, 2026Updated 6 months ago
- Test of a RP2040 PMOD attached to a LiteX SoC.☆28May 16, 2023Updated 3 years ago
Are these results useful?