evanfrazierc / FPGA-MP3-Player
☆12Updated 9 years ago
Alternatives and similar repositories for FPGA-MP3-Player:
Users that are interested in FPGA-MP3-Player are comparing it to the libraries listed below
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆54Updated last year
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- KiCad design for a minimig compatible board for the QM_XC7A100T_DDR3 board.☆23Updated 2 years ago
- I2S transciever implemented in Verilog HDL☆30Updated 7 years ago
- A comparison of 1st and 2nd order sigma delta DAC for FPGA☆56Updated 4 years ago
- ☆17Updated 2 years ago
- An attempt to reverse engineer a bitstream made for an AL3-10 FPGA☆14Updated 2 years ago
- IceCore Ice40 HX based modular core☆46Updated 4 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆89Updated 4 years ago
- A complete HDMI transmitter implementation in VHDL☆23Updated 3 months ago
- miniSpartan6+ (Spartan6) FPGA based MP3 Player☆27Updated 5 years ago
- An open source PSRAM/HyperRAM controller for Sipeed Tang Nano 9K / Gowin GW1NR-LV9QN88PC6/15 FPGA☆74Updated 2 years ago
- RiscV based SOC with 2D and 3D graphics acceleration for Tang Nano 20K☆36Updated last year
- VGA-compatible text mode functionality☆17Updated 4 years ago
- Update IceStudio to support ColorLight 5A-75X, i5 and ICeSugar Pro FPGA boards☆47Updated last year
- Re-coded Gowin GW1N primitives for Verilator use☆17Updated 2 years ago
- Quickly update a bitstream with new RAM contents☆15Updated 3 years ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆26Updated 4 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆61Updated 6 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆38Updated 11 months ago
- Fusesoc compatible rtl cores☆15Updated 2 years ago
- FPGA gaming distribution for Sipeed Tang FPGA boards☆38Updated last week
- Implementation of a RISC-V CPU in Verilog.☆14Updated last month
- S3GA: a simple scalable serial FPGA☆10Updated 2 years ago
- Portable HyperRAM controller☆54Updated 4 months ago
- Programmable multichannel ADPCM decoder for FPGA☆23Updated 4 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆12Updated 2 years ago
- A port of the OPL3 to the Panologic G1 thin client☆19Updated 5 years ago
- Minimal DVI / HDMI Framebuffer☆79Updated 4 years ago
- Collection of projects for various FPGA development boards☆44Updated 11 months ago