jankralx / dpd_sample_selection
Digital predistortion with sample selection methods.
☆16Updated 5 years ago
Alternatives and similar repositories for dpd_sample_selection:
Users that are interested in dpd_sample_selection are comparing it to the libraries listed below
- This project aims to implement a digital predistortion algorithm for power amplifier linearizion using vhdl. It contains VHDL design for …☆16Updated 2 years ago
- ☆12Updated 5 years ago
- Adaptation of a predistorter (DPD) to linarize a power amplifier (PA) with a comparator in the feedback, based on the direct learning arc…☆10Updated 2 years ago
- Verilog实现OFDM基带☆42Updated 9 years ago
- IEEE 802.11 OFDM-based transceiver system☆33Updated 7 years ago
- PYNQ example of using the RFSoC as a QPSK transceiver.☆99Updated last year
- ☆11Updated 6 years ago
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆95Updated 9 months ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆46Updated last year
- A project demonstrate how to config ad9361 to TX mode and how to transmit MSK☆55Updated 5 years ago
- ☆44Updated 2 years ago
- ☆27Updated last year
- An RFSoC Frequency Planner developed using Python.☆24Updated last year
- Using the Quartus II software, an OFDM transmitter system was designed and implemented on Intel DE2i-150 board. Here QPSK is used as the …☆17Updated 8 years ago
- The Design and Implementation of a Pulse Compression Filter on an FPGA.☆28Updated 3 years ago
- Dual-Mode PSK Transceiver on SDR With FPGA☆28Updated 5 months ago
- 最小和算法实现☆10Updated 4 years ago
- RFSoC QSFP Data Offload Design with GNU Radio☆18Updated 4 months ago
- Learn how to deploy an algorithm to an FPGA using MATLAB and Simulink.☆70Updated 2 months ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆62Updated last year
- Digital Pre-Distortion implementation in GNU Radio☆40Updated 3 years ago
- MATLAB toolbox for ADI transceiver products☆60Updated last week
- DPD using RLS Algorithm☆14Updated 6 years ago
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆22Updated 5 years ago
- Design a new OFDM synchronization algorithm, and implement it with both Matlab and Verilog.☆15Updated 8 years ago
- (RETIRED see https://github.com/analogdevicesinc/hdl instead) FPGA interface reference designs for Analog Devices mixed signal IC product…☆88Updated 6 years ago
- LTE/WiFi/5G-NR SDR Transceiver☆51Updated 6 years ago
- Using Software Designed Radio to transmit MIMO-OFDM QPSK signals at 5 GHz☆94Updated 6 years ago
- - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …☆50Updated 7 years ago
- A collection of phase locked loop (PLL) related projects☆103Updated last year