《互联网络原理与实践(中文翻译)》Principles and Practices of Interconnection Networks
☆28Nov 20, 2020Updated 5 years ago
Alternatives and similar repositories for Principles-and-Practices-of-Interconnection-Networks--Chinese
Users that are interested in Principles-and-Practices-of-Interconnection-Networks--Chinese are comparing it to the libraries listed below
Sorting:
- TACOS: [T]opology-[A]ware [Co]llective Algorithm [S]ynthesizer for Distributed Machine Learning☆32Jun 13, 2025Updated 8 months ago
- ESP32 + MLX90640 IR Camera using the native ESP-IDF☆10Mar 28, 2020Updated 5 years ago
- CLI tool for RTL design space exploration on top of Vivado☆15Jun 5, 2023Updated 2 years ago
- Project repo for the POSH on-chip network generator☆52Mar 18, 2025Updated 11 months ago
- ☆12Mar 1, 2021Updated 5 years ago
- For CPU experiment☆14Feb 23, 2021Updated 5 years ago
- Interface Xilinx XDMA PCIe with DDR3 using MIG-IP on Artix-7 FPGA using Nitefury dev board☆18Apr 13, 2022Updated 3 years ago
- GPU-accelerated LLM Training Simulator☆17Jun 26, 2025Updated 8 months ago
- Latest SvelteKit v.2 blog - can create page or blog with Markdown or Jodit(wysiwyg editor) - Created pages and blogs are in header and th…☆13Aug 19, 2025Updated 6 months ago
- IEEE 754-style floating-point converter☆18Jan 30, 2023Updated 3 years ago
- Cheapest UAC2 using STM32F407+USB3300☆21Feb 26, 2025Updated last year
- Share short notes with just a link. No database. No storage!☆19Sep 18, 2025Updated 5 months ago
- Contactless Temperature Monitoring over BLE using ESP32 and MLX90640☆16Apr 2, 2020Updated 5 years ago
- This is a collection of the built in libraries of the VHDPlus IDE toghether with examples. Commits will be featured in the IDE with futur…☆20Feb 27, 2024Updated 2 years ago
- Meeting materials☆19Feb 26, 2026Updated last week
- Code for DCT_SNN, an input encoding scheme for SNNs using DCT☆20Sep 30, 2021Updated 4 years ago
- RISC-V IOMMU in verilog☆23Jun 18, 2022Updated 3 years ago
- double_fpu_verilog☆20Jul 17, 2014Updated 11 years ago
- Tutorial Material from the SST Team☆25Aug 5, 2025Updated 7 months ago
- Espressif ESP32S3 development board, ESP32S3-A development board is built with Espressif original modules, ESP32S3-B development board is…☆25Jul 28, 2023Updated 2 years ago
- port from python to C++ PyVCD lib☆23Jun 16, 2025Updated 8 months ago
- TuRTLe: A Unified Evaluation of LLMs for RTL Generation 🐢 (MLCAD 2025)☆39Feb 23, 2026Updated last week
- The repo holds the draft non-ISA Server SoC specification being developed by the Server SoC specification TG and to release intermediate …☆30Feb 26, 2026Updated last week
- A simple dot file / graph generator for Verilog syntax trees.☆23Jul 16, 2016Updated 9 years ago
- An ultra-low noise amplifier to measure low-noise LDO/OPA's wide band output noise, and many other interesting measurements. Referred to …☆32Jul 4, 2023Updated 2 years ago
- RISC-V IOMMU Demo (Linux & Bao)☆24Dec 5, 2023Updated 2 years ago
- rv8 benchmark suite☆23Jul 30, 2020Updated 5 years ago
- Quasar 2.0: Chisel equivalent of SweRV-EL2☆33Apr 13, 2021Updated 4 years ago
- A Chisel RTL generator for network-on-chip interconnects☆226Nov 7, 2025Updated 3 months ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆24Aug 23, 2021Updated 4 years ago
- Open-source AMBA CHI infrastructures (supporting Issue B, E.b)☆34Updated this week
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆20Feb 4, 2026Updated last month
- A gdbstub for connecting GDB to a RISC-V Debug Module☆30Oct 7, 2024Updated last year
- ☆27Dec 15, 2021Updated 4 years ago
- BookSim 1.0☆25Mar 22, 2014Updated 11 years ago
- A simple CRUD project using SvelteKit, Prisma, sqlite, and TypeScript☆25Oct 20, 2025Updated 4 months ago
- Vivado board files for the Kintex 7 HPC V2 FPGA board.☆25Jul 31, 2020Updated 5 years ago
- Wireless remote controller for Klipper 3D printers☆26Oct 21, 2021Updated 4 years ago
- A flexible and scalable development platform for modern FPGA projects.☆41Feb 2, 2026Updated last month