《互联网络原理与实践（中文翻译）》Principles and Practices of Interconnection Networks
☆30Nov 20, 2020Updated 5 years ago
Alternatives and similar repositories for Principles-and-Practices-of-Interconnection-Networks--Chinese
Users that are interested in Principles-and-Practices-of-Interconnection-Networks--Chinese are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Parallel_Computer_Architecture经典书籍☆17May 13, 2022Updated 4 years ago
- For CPU experiment☆14Feb 23, 2021Updated 5 years ago
- ☆22Sep 10, 2025Updated 8 months ago
- double_fpu_verilog☆21Jul 17, 2014Updated 11 years ago
- Code for DCT_SNN, an input encoding scheme for SNNs using DCT☆20Sep 30, 2021Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- GPU-accelerated LLM Training Simulator☆19Jun 26, 2025Updated 11 months ago
- ☆25Jun 11, 2025Updated 11 months ago
- This github repository summarizes relevant papers for shift left techniques in electronic design automation (EDA).☆32Sep 19, 2025Updated 8 months ago
- A type-safe, formally verifiable HDL compiler in Lean 4. Inspired by Clash, built for high-assurance hardware synthesis.☆69May 13, 2026Updated last week
- enchmarking Large Language Models' Resistance to Malicious Code☆16Apr 23, 2026Updated last month
- SystemVerilog IPs and Modules for architectural redundancy designs.☆20Updated this week
- Meeting materials☆24May 11, 2026Updated 2 weeks ago
- The repo holds the draft non-ISA Server SoC specification being developed by the Server SoC specification TG and to release intermediate …☆34Updated this week
- TuRTLe: A Unified Evaluation of LLMs for RTL Generation 🐢 (MLCAD 2025)☆43Feb 23, 2026Updated 3 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- RISC-V IOMMU in verilog☆23Jun 18, 2022Updated 3 years ago
- rv8 benchmark suite☆25Jul 30, 2020Updated 5 years ago
- ESP32 + MLX90640 IR Camera using the native ESP-IDF☆12Mar 28, 2020Updated 6 years ago
- RISC-V IOMMU Demo (Linux & Bao)☆24Dec 5, 2023Updated 2 years ago
- ☆15May 22, 2024Updated 2 years ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆25Aug 23, 2021Updated 4 years ago
- A Chisel RTL generator for network-on-chip interconnects☆231Nov 7, 2025Updated 6 months ago
- CLI tool for RTL design space exploration on top of Vivado☆15Jun 5, 2023Updated 2 years ago
- Documenting my LeetCode training journey during my doctoral studies.☆23Aug 31, 2023Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- COCCL: Compression and precision co-aware collective communication library☆32Mar 16, 2025Updated last year
- Demo host and enclave applications exercising most functionality.☆33Jun 12, 2023Updated 2 years ago
- Network on Chip Simulator☆318Apr 23, 2026Updated last month
- ☆38Jun 3, 2024Updated last year
- Eyrie enclave runtime kernel☆37Aug 2, 2023Updated 2 years ago
- ☆47Aug 23, 2021Updated 4 years ago
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆20Apr 23, 2026Updated last month
- This is a tutorial to learn LLVM, I realize a backend to compiler machine code for cpu0 which is a simple RISC cpu.☆273Dec 28, 2021Updated 4 years ago
- The wafer-native AI accelerator simulation platform and inference engine.☆55Jan 1, 2026Updated 4 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- BookSim 1.0☆25Mar 22, 2014Updated 12 years ago
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆67Jul 5, 2025Updated 10 months ago
- RISC-V Security Model☆35Updated this week
- ☆12Mar 1, 2021Updated 5 years ago
- 不炼金丹不坐禅， 不为商贾不耕田。 闲来写就青山卖， 不使人间造孽钱。☆39Sep 14, 2019Updated 6 years ago
- 清華大學 | 積體電路設計實驗 (IC LAB) | 110上☆48Oct 14, 2022Updated 3 years ago
- ☆32Aug 21, 2021Updated 4 years ago