Education kit for teaching introductory Arm-based system-on-chip design on FPGA with lectures and practical labs (educational)
☆159Oct 7, 2025Updated 7 months ago
Alternatives and similar repositories for Introduction-to-SoC-Design-Education-Kit
Users that are interested in Introduction-to-SoC-Design-Education-Kit are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Education kit for teaching advanced Arm Cortex-A system-on-chip design on FPGA platforms with lectures and hands-on labs (educational)☆126Oct 7, 2025Updated 7 months ago
- Education kit for teaching computer architecture with a 5-stage Arm-based Verilog core and hands-on labs (educational)☆310Mar 23, 2026Updated last month
- Education kit for teaching VLSI fundamentals through practical microprocessor design using industry EDA tools (educational)☆326May 30, 2025Updated 11 months ago
- Education kit for rapid embedded systems design on Arm Cortex-M platforms with lectures, labs, and Mbed-based prototyping (educational)☆117Oct 7, 2025Updated 7 months ago
- Education kit for teaching real-time operating systems design and programming on Arm platforms with labs and slides (educational)☆89Oct 24, 2025Updated 6 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Research enablement kit for designing and prototyping a Cortex-M0–based SoC with custom IP integration (education, research)☆16Jun 13, 2025Updated 11 months ago
- Education kit for teaching efficient embedded systems design on Arm Cortex-M platforms with labs and lecture materials (educational)☆119Oct 7, 2025Updated 7 months ago
- Education kit for teaching embedded Linux system design and development on Arm-based platforms with lectures and labs (educational)☆190Mar 16, 2026Updated 2 months ago
- Reference book for SoC and FPGA designers integrating Arm Cortex-M processors with AMBA bus architectures (educational)☆40Jun 16, 2025Updated 11 months ago
- System Verilog BootCamp☆25Jan 21, 2022Updated 4 years ago
- Textbook for advanced students and engineers on modern SoC design using Arm Cortex-A: architecture, interconnects, validation, and fabric…☆44Jun 11, 2025Updated 11 months ago
- Education kit for teaching IoT fundamentals with Arm Cortex-M and Mbed: lectures and labs on embedded systems, connectivity, cloud, and s…☆35May 30, 2025Updated 11 months ago
- Very simple Cortex-M1 SoC design based on ARM DesignStart☆18Jan 25, 2022Updated 4 years ago
- Education kit for teaching introductory robotic systems on Arm platforms with lectures and hands-on labs (educational)☆23Oct 7, 2025Updated 7 months ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Education kit for teaching graphics and 3D mobile game development on Arm Mali GPUs with lectures and practical labs (educational)☆22Oct 7, 2025Updated 7 months ago
- Textbook introducing DSP fundamentals using Arm Cortex-M microcontrollers with hands-on labs (educational)☆90Jul 15, 2025Updated 10 months ago
- Textbook introducing operating systems foundations with GNU/Linux on Arm-based Raspberry Pi platforms (educational)☆74Jun 16, 2025Updated 11 months ago
- System on Chip verified with UVM/OSVVM/FV☆36May 3, 2026Updated 2 weeks ago
- Beginner-friendly textbook for designing embedded system applications on Arm Cortex-M with hands-on IoT projects (educational)☆120Jun 16, 2025Updated 11 months ago
- Browser-based Arm micro-architecture simulator with single-cycle and pipelined CPU visualization (educational, simulator)☆133Jun 13, 2025Updated 11 months ago
- Computer Architecture UIUC SP 2018☆14May 4, 2018Updated 8 years ago
- A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)☆35Mar 21, 2020Updated 6 years ago
- RISCV MYTH 4 stage pipelined core designed using TL-Verilog and supports RV32I base integer instruction set☆15Jan 14, 2021Updated 5 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Simulator that maintains coherent caches for 4, 8 and 16 core CMP. Implementation of MSI, MESI, MOSI, MOESI and MOESIF protocols for a b…☆11Jan 6, 2015Updated 11 years ago
- The open- MSP430 is an open-source 16-bit microcontroller core written in Verilog, that is compatible with the Texas Instruments MSP430 m…☆18Jan 28, 2022Updated 4 years ago
- Course materials for learners to build autonomous cars and smart cities using micro:bit and Arm-based IoT robotics (educational)☆16Jun 12, 2025Updated 11 months ago
- ☆17Apr 25, 2024Updated 2 years ago
- A Verilog based 5-stage fully functional pipelined RISC-V Processor code.☆67May 8, 2021Updated 5 years ago
- ☆16Mar 16, 2026Updated 2 months ago
- RISC V core implementation using Verilog.☆30Mar 27, 2021Updated 5 years ago
- Project-based curriculum for teaching Arduino, IoT, and data science across secondary school levels (educational)☆11Jun 12, 2025Updated 11 months ago
- ☆15May 8, 2018Updated 8 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- General Purpose IO with APB4 interface☆16May 10, 2024Updated 2 years ago
- RTL Design and Verification☆21Jan 4, 2021Updated 5 years ago
- OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology sc…☆1,787Mar 25, 2026Updated last month
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆245Jul 16, 2023Updated 2 years ago
- Lab material for the three week course on builiding a RISC-V microprocessor☆20Jan 14, 2026Updated 4 months ago
- a curated "awesome list" of open-source hardware Intellectual Property (IP) blocks designed specifically for the SkyWater 130nm (SKY130) …☆20Apr 18, 2026Updated last month
- Design implementation of the RV32I Core in Verilog HDL with Zicsr extension☆127Dec 17, 2023Updated 2 years ago