Alternatives and similar repositories for AIaccelerators-SC23-tutorial

Users that are interested in AIaccelerators-SC23-tutorial are comparing it to the libraries listed below

• Xilinx / xacc
  Heterogeneous Accelerated Computed Cluster (HACC) Resources Page
  ☆21Updated last week
• spcl / SMI
  Streaming Message Interface: High-Performance Distributed Memory Programming on Reconfigurable Hardware
  ☆16Updated 3 years ago
• CMU-SAFARI / SPARTA
  A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…
  ☆19Updated last year
• cornell-zhang / UniSparse
  Code base for OOPSLA'24 paper: UniSparse: An Intermediate Language for General Sparse Format Customization
  ☆30Updated 6 months ago
• CMU-SAFARI / SparseP
  SparseP is the first open-source Sparse Matrix Vector Multiplication (SpMV) software package for real-world Processing-In-Memory (PIM) ar…
  ☆73Updated 2 years ago
• Blaok / tapa
  TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…
  ☆19Updated 8 months ago
• sstsimulator / sst-tutorials
  Tutorial Material from the SST Team
  ☆19Updated last year
• pnnl / COMET
  ☆41Updated last week
• OCT-FPGA / OCT-Tutorials
  ☆30Updated 7 months ago
• olcf / NVIDIA-tensor-core-examples
  ☆18Updated 5 years ago
• sstsimulator / sst-macro
  SST Macro Element Library
  ☆37Updated last week
• spcl / DNN-cpp-proxies
  C++/MPI proxies for distributed training of deep neural networks.
  ☆13Updated 2 years ago
• esa-tu-darmstadt / spn-compiler
  Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.
  ☆23Updated 5 months ago
• cyanguwa / nersc-roofline
  ☆43Updated 4 years ago
• kumasento / polsca
  Polyhedral High-Level Synthesis in MLIR
  ☆30Updated 2 years ago
• gpgpu-sim / cutlass-gpgpu-sim
  ☆25Updated 5 years ago
• Xilinx / HPCG_FPGA
  ☆9Updated 2 years ago
• stonne-simulator / omega
  A simulation framework for modeling efficiency of Graph Neural Network Dataflows
  ☆22Updated 3 months ago
• OSU-STARLAB / GPGPU-Ramulator-Simulator
  Replace original DRAM model in GPGPU-sim with Ramulator DRAM model
  ☆18Updated 6 years ago
• Xilinx / mlir-xten
  ☆15Updated last week
• sfu-arch / SpGEMM
  ☆35Updated 4 years ago
• stephenneuendorffer / vyasa
  Xilinx Modifications to Halide
  ☆12Updated 4 years ago
• he-actlab / polymath
  ☆21Updated 2 months ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 3 years ago
• PrincetonUniversity / MosaicSim
  Heterogeneous simulator for DECADES Project
  ☆32Updated 11 months ago
• Xilinx / xup_aie_training
  Hands-on experience programming AI Engines using Vitis Unified Software Platform
  ☆40Updated 9 months ago
• pku-liang / HASCO
  agile hardware-software co-design
  ☆46Updated 3 years ago
• IntelLabs / t2sp
  Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)
  ☆31Updated last year
• UoB-HPC / SimEng
  The University of Bristol HPC Simulation Engine
  ☆96Updated this week
• union-codesign / union
  ☆14Updated 3 years ago