ananthamapod / Cache-Simulator
Cache Simulator in C written for Computer Architecture course CS 198:211 at Rutgers University
☆20Updated 9 years ago
Related projects ⓘ
Alternatives and complementary repositories for Cache-Simulator
- Creating beautiful gem5 simulations☆45Updated 3 years ago
- Haystack is an analytical cache model that given a program computes the number of cache misses.☆42Updated 5 years ago
- SMASH is a hardware-software cooperative mechanism that enables highly-efficient indexing and storage of sparse matrices. The key idea of…☆15Updated 4 years ago
- Python Cache Hierarchy Simulator☆87Updated 3 weeks ago
- Light weight threading library for gem5 syscall emulator (git mirror)☆15Updated 7 years ago
- IBM Platform-Independent Software Analysis☆14Updated 6 years ago
- A CPU cache simulator written in Python☆26Updated 8 years ago
- Automata Benchmark Suite☆19Updated last year
- SST Architectural Simulation Components and Libraries☆92Updated this week
- ☆10Updated 4 years ago
- A fast and scalable x86-64 multicore simulator☆31Updated 3 years ago
- Code released to accompany the ISCA paper: "T4: Compiling Sequential Code for Effective Speculative Parallelization in Hardware"☆27Updated 2 years ago
- SimplePIM is the first high-level programming framework for real-world processing-in-memory (PIM) architectures. Described in the PACT 20…☆20Updated last year
- Heterogeneous simulator for DECADES Project☆28Updated 5 months ago
- gem5 configuration for intel's skylake micro-architecture☆45Updated 2 years ago
- The Splash-3 benchmark suite☆42Updated last year
- Hopscotch: A benchmark suite for memory performance evaluation☆15Updated 2 years ago
- A Benchmark Suite for Heterogeneous System Computation☆52Updated 2 weeks ago
- High-performance automata-processing engines are traditionally evaluated using a limited set of regular expression rulesets. While regula…☆32Updated 11 months ago
- NeuroVectorizer is a framework that uses deep reinforcement learning (RL) to predict optimal vectorization compiler pragmas for for loops…☆91Updated last year
- A Full-System Framework for Simulating NDP devices from Caches to DRAM☆14Updated 10 months ago
- ☆9Updated 2 years ago
- Near-storage compute aware file system and FPGA operator pipelines.☆29Updated 2 years ago
- ☆36Updated this week
- A PIM instrumentation, compilation, execution, simulation, and evaluation repository for BLIMP-style architectures.☆16Updated 2 years ago
- An attempt at achieving the theoretical best memory bandwidth of my machine.☆52Updated 11 years ago
- Simulator or Non-Uniform Cache Architectures☆10Updated 6 years ago
- PIM-DL: Expanding the Applicability of Commodity DRAM-PIMs for Deep Learning via Algorithm-System Co-Optimization☆25Updated 8 months ago
- An FPGA integration and acceleration of the popular FAISS framework for approximate similarity search☆20Updated 5 years ago
- CUDAAdvisor: a GPU profiling tool☆48Updated 6 years ago