Xilinx / kria-docker
☆12Updated 4 months ago
Related projects ⓘ
Alternatives and complementary repositories for kria-docker
- ☆24Updated 4 months ago
- PYNQ support and examples for Kria SOMs☆92Updated 3 months ago
- ☆40Updated 3 years ago
- This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.☆94Updated 2 years ago
- PYNQ Composabe Overlays☆67Updated 5 months ago
- Board files to build Ultra 96 PYNQ image☆152Updated 2 months ago
- ☆27Updated last year
- Repository used to support automated builds under PetaLinux tools that use Yocto.☆59Updated last month
- Open source AMD Xilinx Kria UltraScale+ SoM baseboard☆40Updated 2 months ago
- Kria Vitis platforms and overlays☆88Updated last month
- Vitis Repository for Avnet Designs☆9Updated last month
- Raspberry Pi v2 camera (IMX219) to DisplayPort of Ultra96-V2 board through PL☆67Updated 2 years ago
- ☆116Updated 3 years ago
- A multi-board Extended Kalman Filter (EKF)☆28Updated 6 years ago
- ☆63Updated 4 months ago
- ☆24Updated 2 years ago
- Avnet Board Definition Files☆125Updated this week
- FOS - FPGA Operating System☆62Updated 4 years ago
- A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools☆39Updated 6 years ago
- Vitis Model Composer Examples and Tutorials☆75Updated this week
- Temporary repo to gather information about the Kria KV260 board☆56Updated 3 years ago
- RFSoC Spectrum Analyser Module on PYNQ.☆69Updated 4 months ago
- Ubuntu 18.04 Desktop for Ultra96/Ultra96-V2☆19Updated 4 years ago
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆37Updated 2 years ago
- Networking Overlay on PYNQ☆44Updated 5 years ago
- ☆61Updated 7 years ago
- Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.☆25Updated 4 years ago
- Premade bitstreams and block designs to complemented the PYNQ overlay tutorial☆39Updated 2 years ago
- This project is trying to create a base vitis platform to run with DPU☆47Updated 4 years ago