Exercises for Design of Integrated circuits
☆17Dec 28, 2023Updated 2 years ago
Alternatives and similar repositories for dicex
Users that are interested in dicex are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Advanced Integrated Circuits 2026☆17Oct 9, 2026Updated 3 weeks ago
- Files for Advanced Integrated Circuits☆47Sep 29, 2026Updated last month
- Design of miller compensated 2 stage opamp using open source SKY130PDK☆19Jun 18, 2025Updated last year
- Tiny Tapeout Demo board for TT01, 02 & 03☆11Apr 15, 2024Updated 2 years ago
- Download YouTube videos and audio with ease (support playlists). Easy to use GUI for yt-dlp written in Qt C++.☆11Feb 6, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Build a SystemVerilog Environment for an ALU, using OOP testbench components as; stimulus generator, driver, monitor, scoreboard. ALU was…☆10Mar 4, 2023Updated 3 years ago
- Advanced Integrated Circuits 2025☆14Nov 1, 2025Updated last year
- High Speed VCO in Skywater 130nm☆10Mar 23, 2022Updated 4 years ago
- SIPEED Tang MEGA 138K with FPGA GOWIN GW5AST-138 SOC (Embedded RISC-V AE350)☆12Mar 12, 2024Updated 2 years ago
- This repo contains all the materials needed to perform the ADALM-Pluto SDR Hands-On event developed by the Spanish MATLAB Ambassadors☆14Jul 8, 2022Updated 4 years ago
- A 4x4x4 Tic-Tac-Toe game suitable for porting to embedded hardware platforms☆11Sep 6, 2017Updated 9 years ago
- Collection of various Jupyter and Quarto notebooks related to the design of CMOS analog integrated circuits☆34Aug 19, 2026Updated 2 months ago
- Efabless mpw7 submission☆16May 6, 2024Updated 2 years ago
- Verification of an Asynchronous FIFO using UVM & SVA☆13Jun 26, 2025Updated last year
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Modelsim QEMU Unicorn integration via the FLI☆15Oct 19, 2025Updated last year
- ☆13Apr 22, 2021Updated 5 years ago
- A deep dive into the interrupt handling mechanisms within the Linux kernel. Explore how different devices, from keyboards to Ethernet por…☆11Oct 15, 2023Updated 3 years ago
- SystemVerilog implementation of a Dynamically Weighted Round Robin arbiter☆14Mar 21, 2017Updated 9 years ago
- ☆11Apr 18, 2026Updated 6 months ago
- Design of LDO using open source SKY130PDK☆17Aug 24, 2024Updated 2 years ago
- repository for a bandgap voltage reference in SKY130 technology☆44Jan 20, 2023Updated 3 years ago
- ☆15Oct 9, 2026Updated 3 weeks ago
- Custom IC Creator (ciccreator) is a compiler that takes in a object definition file (JSON), a SPICE file, and a design rule file and outp…☆47Aug 8, 2026Updated 2 months ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Python script to manage Questa/Modelsim simulations☆14Jan 2, 2014Updated 12 years ago
- Tiny Tapeout IHP 26a shuttle using the open source ihp-sg13g2 PDK☆12Apr 1, 2026Updated 7 months ago
- Verilog-HDL codes, Tcl files, and etc. for TSMC_65nm☆12Jul 2, 2019Updated 7 years ago
- TMDS encoding tools☆18Jan 11, 2018Updated 8 years ago
- PCIe System Verilog Verification Environment developed for PCIe course☆16Mar 26, 2024Updated 2 years ago
- ☆13May 8, 2022Updated 4 years ago
- Tapeouts done using OpenFASOC☆22Nov 3, 2025Updated 11 months ago
- A collection of gmid scripts and Data to plot various parameters needed for gm/id based design methodology using open source tools and Go…☆17Oct 24, 2026Updated last week
- Eye-Blink Artefact Detection From Low-Cost EEG Brain Computer Interface with k-means++☆11Sep 1, 2021Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A Teensy/Arduino-based programmer firmware for NXP LPC chips using NXP's ISP☆12Apr 5, 2012Updated 14 years ago
- Designing and implementing LZ4 decompression algorithm in hardware (FPGA) using Verilog hardware description language☆19Feb 20, 2019Updated 7 years ago
- Black-Scholes style options pricing using Monte Carlo methods. Written in VHDL for the Cyclone IV FPGA board.☆11Jun 10, 2015Updated 11 years ago
- ☆14Feb 16, 2025Updated last year
- Formulated testbench using System Verilog and UVM and verified I2C bus controller with APB interface☆15Dec 8, 2020Updated 5 years ago
- KianV GF180 ASIC runs ulinux, linux and XV6☆17Jan 15, 2026Updated 9 months ago
- AMBA bus lecture material☆11Jan 21, 2020Updated 6 years ago