Verilog-HDL codes, Tcl files, and etc. for TSMC_65nm
☆13Jul 2, 2019Updated 7 years ago
Alternatives and similar repositories for tsmc65
Users that are interested in tsmc65 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆22Oct 12, 2026Updated 3 weeks ago
- A documentation on my findings in Cadence☆11Feb 27, 2020Updated 6 years ago
- Download YouTube videos and audio with ease (support playlists). Easy to use GUI for yt-dlp written in Qt C++.☆11Feb 6, 2025Updated last year
- Build a SystemVerilog Environment for an ALU, using OOP testbench components as; stimulus generator, driver, monitor, scoreboard. ALU was…☆10Mar 4, 2023Updated 3 years ago
- Cascadable Low Pass Filter☆16Jun 13, 2019Updated 7 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆12Jun 11, 2018Updated 8 years ago
- My HaD UPS + Switch Mode Power Supply repository☆18Aug 2, 2018Updated 8 years ago
- Based on https://gist.github.com/masaakif/414375 but installable by Vundle☆10Jun 3, 2017Updated 9 years ago
- SEGGER-RTT Terminal program using CMSIS-DAP (DAPLink)☆13Jun 23, 2018Updated 8 years ago
- Fast & lightweight interface for running Nano Banana LLM and compact local models on your PC. Optimized for high-speed AI interactions.☆44Mar 17, 2026Updated 7 months ago
- A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM☆33Jun 1, 2022Updated 4 years ago
- TSMC_MPC_PMSM:foc☆15Sep 28, 2018Updated 8 years ago
- UART 16550 core☆45Jul 17, 2014Updated 12 years ago
- This repository contains all major projects completed as part of the EECS 4612: Digital VLSI Design course at York University. The projec…☆13Jul 12, 2025Updated last year
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Modelsim QEMU Unicorn integration via the FLI☆15Oct 19, 2025Updated last year
- Cadence PCB and SCH Library and some tools☆14Jan 9, 2015Updated 11 years ago
- Tensor computing core☆15Jul 8, 2026Updated 4 months ago
- PROGRAM_FTDI 是一个用于设置和管理 基于 FT232/FT2232/FT4232 的 Xilinx JTAG 设备的序列号信息 Windows Forms 应用程序☆21Nov 27, 2024Updated last year
- AD9959 4-channel Direct Digital Synthesis Arduino Library☆20Aug 13, 2023Updated 3 years ago
- Codes for femtosecond laser interaction research☆13Aug 10, 2026Updated 2 months ago
- Verification of an Asynchronous FIFO using UVM & SVA☆13Jun 26, 2025Updated last year
- 该驱动板是全N－ｍｏｓ的FOC 双路电流环驱动板，超高性价比！资料分享！☆18Mar 14, 2022Updated 4 years ago
- ☆28Jun 21, 2024Updated 2 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Educational Design Kit for Synopsys Tools with a set of Characterized Standard Cell Library☆38Jan 18, 2022Updated 4 years ago
- EV Onboard Charger with PFC and LLC Resonant Converter☆20Jul 16, 2026Updated 3 months ago
- PCIe System Verilog Verification Environment developed for PCIe course☆16Mar 26, 2024Updated 2 years ago
- ☆13May 8, 2022Updated 4 years ago
- Simply Cyclone IV EP4CE10 Developer board (KiCAD edition)☆10Nov 25, 2018Updated 7 years ago
- Example of a full DC synthesis script for a simple design☆14Feb 25, 2019Updated 7 years ago
- A crate to write CMSIS-DAP flash algorithms for flashing embedded targets☆10Jan 3, 2026Updated 10 months ago
- ☆15Jul 5, 2019Updated 7 years ago
- Python script to manage Questa/Modelsim simulations☆14Jan 2, 2014Updated 12 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- An open-source MuleRun☆11Feb 25, 2026Updated 8 months ago
- Spike with a coherence supported cache model☆14Jul 9, 2024Updated 2 years ago
- Examples discussed in the book: "Advanced FPGA design: Architecture, Implementation, and Optimization" by Steve Kilts, in System Verilog.☆15Feb 12, 2024Updated 2 years ago
- Hardware implementation of control algorithm for three phase voltage inverters. Implemented using Verilog and MATLAB. Tested with an impl…☆23Dec 20, 2019Updated 6 years ago
- QEMU mirror with Cortex-Mx additions☆11Apr 18, 2015Updated 11 years ago
- Advanced Debug Interface☆14Jan 23, 2025Updated last year
- Designing and implementing LZ4 decompression algorithm in hardware (FPGA) using Verilog hardware description language☆19Feb 20, 2019Updated 7 years ago