prantoamt / 16bit_processor_design
☆12Updated 6 years ago
Alternatives and similar repositories for 16bit_processor_design:
Users that are interested in 16bit_processor_design are comparing it to the libraries listed below
- RV32I single cycle simulation on open-source software Logisim.☆17Updated 2 years ago
- Experiments with Cologne Chip's GateMate FPGA architecture☆15Updated last year
- PCB layout for my cheap FPGA HDMI experimenting board☆10Updated 10 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆12Updated 6 years ago
- Mini CPU design with JTAG UART support☆19Updated 3 years ago
- Example Risc-V SoC with VexRiscv, custom peripherals and bare metal firmware☆10Updated 4 years ago
- Design a CPU in VHDL☆10Updated 2 years ago
- A SoC for DOOM☆16Updated 3 years ago
- My optimistic - yet unexpectedly successful - attempt to create a LEON3 inside my FPGA boards (ZestSC1, Pano Logic G2)☆11Updated 4 years ago
- simple wishbone client to read buttons and write leds☆17Updated last year
- Learn how to create your own 32-bit system from scratch.☆13Updated 2 years ago
- ☆21Updated 7 years ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆20Updated last year
- PLEASE MOVE TO PAWSv2☆17Updated 2 years ago
- Co-simulation and behavioural verification with VHDL, C/C++ and Python/m☆13Updated this week
- A Y86-64 processor implemented using Verilog☆17Updated 3 years ago
- Formally-verified Z80 core written using nMigen☆11Updated 5 years ago
- Quickly update a bitstream with new RAM contents☆15Updated 3 years ago
- IO and periphery cells for SKY130 provided by SkyWater.☆9Updated last year
- PS2 interface☆17Updated 7 years ago
- TI-99/4A FPGA implementation for the Icestorm toolchain☆15Updated 2 weeks ago
- ☆14Updated last year
- ice40 UltraPlus demos☆16Updated 5 years ago
- Automated Git mirror of Gaisler's GRLIB/Leon3 releases☆17Updated last month
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆35Updated last year
- rtf8088☆10Updated 10 years ago
- Master-thesis-final☆18Updated last year
- An example OMI Device FPGA with 2 DDR4 memory ports☆16Updated 2 years ago
- Ethernet MAC 10/100 Mbps☆24Updated 3 years ago
- Submission template for TT02☆24Updated last year