pranith / usimmLinks
USIMM: the Utah SImulated Memory Module
☆25Updated 11 years ago
Alternatives and similar repositories for usimm
Users that are interested in usimm are comparing it to the libraries listed below
Sorting:
- gem5-nvmain hybrid simulator supporting simulation of DRAM-NVM hybrid memory system☆79Updated 6 years ago
- Source code for the Base-Delta-Immediate Compression Algorithm (described in the PACT 2012 paper by Pekhimenko et al. at http://users.ece…☆28Updated 10 years ago
- This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews shoul…☆13Updated 5 years ago
- PARSEC Benchmark http://parsec.cs.princeton.edu 3.0-beta-20150206 ported to Ubuntu 22.04 and with proper version control and SPLASH2 port…☆102Updated 3 weeks ago
- This is a processing-in-memory simulator which models 3D-stacked memory within gem5. Also includes the workloads used for IMPICA (In-Memo…☆48Updated 8 years ago
- SHMA: Software-managed Caching for Hybrid DRAM/NVM Memory Architectures, implemented with zsim and nvmain hybrid simulators☆62Updated 8 years ago
- VANS: A validated NVRAM simulator☆26Updated 2 years ago
- A fast and scalable x86-64 multicore simulator☆31Updated 4 years ago
- Memory System Microbenchmarks☆64Updated 2 years ago
- Clio, ASPLOS'22.☆78Updated 3 years ago
- A simulator of a memory controller designed for hybrid DRAM+NVM.☆21Updated 9 years ago
- NVMain - An Architectural Level Main Memory Simulator for Emerging Non-Volatile Memories☆90Updated 6 years ago
- Creating beautiful gem5 simulations☆49Updated 4 years ago
- An FPGA-based full-stack in-storage computing system.☆38Updated 5 years ago
- ☆33Updated 5 years ago
- HSCC is implemented with zsim-nvmain hybrid simulator, it has achieved the following functions: (1) Memory management simulations (such a…☆54Updated 4 years ago
- Examples of DPU programs using the UPMEM DPU SDK☆44Updated 9 months ago
- Characterizing and Modeling Non-Volatile Memory Systems [MICRO'20, TopPicks'21]☆32Updated 3 years ago
- ☆79Updated 5 years ago
- ☆20Updated 5 years ago
- This is where gem5 based DRAM cache models live.☆18Updated 2 years ago
- Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …☆22Updated 5 years ago
- A cache simulator designed to be used with memory access traces obtained from Pin (www.pintool.org)☆23Updated 7 years ago
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆179Updated 3 years ago
- A Multiplatform benchmark designed to provide holistic, detailed and close-to-hardware view of memory system performance with family of b…☆42Updated last month
- CXL-DMSim: A Full-System CXL Disaggregated Memory Simulator With Comprehensive Silicon Validation☆104Updated last month
- ☆31Updated 4 years ago
- A fast and scalable x86-64 multicore simulator☆380Updated last year
- This is the respository that holds the artifacts of MICRO'23 -- Demystifying CXL Memory with True CXL-Ready Systems and CXL Memory Device…☆50Updated last year
- gem5 Tips & Tricks☆70Updated 5 years ago