Tools for emulating transistor-level netlists on FPGAs
☆119Apr 2, 2011Updated 15 years ago
Alternatives and similar repositories for FPGA-netlist-tools
Users that are interested in FPGA-netlist-tools are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- crap-o-scope scope implementation for icestick☆20Jun 1, 2018Updated 7 years ago
- sn76489an compatible Verilog core, with emphasis on FPGA implementation and Megadrive/Master System compatibility☆31Jan 6, 2025Updated last year
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆16Jan 6, 2023Updated 3 years ago
- Verilog VPI VGA Simulator using SDL☆11Feb 9, 2015Updated 11 years ago
- HDMI Expansion Modules compatible with the Pmod standard☆11Apr 5, 2018Updated 8 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- A version of f32c/arduino that works with the SpinalHDL Vexriscv Murax SoC☆14May 23, 2019Updated 6 years ago
- Minimig for the DE1 board☆50Apr 18, 2022Updated 4 years ago
- Minimig☆12Feb 15, 2016Updated 10 years ago
- Quartus Lite docker☆38Sep 26, 2020Updated 5 years ago
- Small microcoded 68000 verilog softcore☆60Oct 30, 2018Updated 7 years ago
- A set of small Verilog projects, to simulate and implement on FPGA development boards☆15Mar 5, 2018Updated 8 years ago
- A RRAM addon for the NCSU FreePDK 45nm☆26Jan 10, 2022Updated 4 years ago
- A superfast C compiler inspired by TinyCC☆16May 27, 2015Updated 10 years ago
- Opensource building blocks for TinyFPGA microcontrollers and retro computers.☆18Sep 29, 2017Updated 8 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- a small (~140 line) and portable 6502 emulator demo.☆19Jan 4, 2022Updated 4 years ago
- Demos Commander, dual-pane orthodox file manager☆21Feb 14, 2024Updated 2 years ago
- ☆78Feb 12, 2026Updated 3 months ago
- Gate array reverse engineering☆29Dec 28, 2025Updated 4 months ago
- 32-bit RISC-V based processor with memory controler☆16Sep 2, 2022Updated 3 years ago
- Carrier for efabless Caravel chip used for Google/Skywater 130nm shuttle program.☆18Sep 24, 2021Updated 4 years ago
- Fork from https://sourceforge.net/projects/gds3d☆69Jun 11, 2024Updated last year
- A reconfigurable logic circuit made of identical rotatable tiles.☆26Nov 15, 2021Updated 4 years ago
- Details for installing Quartus on Linux (via VMs and Docker containers) to create build machines for Altera FPGA projects☆18Aug 6, 2016Updated 9 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Pipelined FFT/IFFT 64 points processor☆11Jul 17, 2014Updated 11 years ago
- Logarithmic DAC for AY8913 and SN76489 programmable sound generators (Done as part of Zero To ASIC Analog course)☆11Jun 1, 2024Updated last year
- SATA sniffing☆15Jul 28, 2022Updated 3 years ago
- shdl6800: A 6800 processor written in SpinalHDL☆25Jan 12, 2020Updated 6 years ago
- FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC☆59Feb 3, 2023Updated 3 years ago
- This fork family includes the 6502 upgraded to 32-bit address bus, in Verilog HDL☆20Feb 23, 2020Updated 6 years ago
- Proof of Concept to learn Amaranth as an entry effort for Supercon's RTL design competition☆10Nov 11, 2022Updated 3 years ago
- PDP-11/70 CPU core and SoC☆144Jun 10, 2024Updated last year
- RCA COSMAC CDP1802 functional equivalent CPU core in VHDL☆27Jan 7, 2018Updated 8 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Apollo CPU Core in Verilog. For learning and having fun with open FPGA☆44Sep 9, 2016Updated 9 years ago
- ☆13Jan 5, 2014Updated 12 years ago
- One header file library that implement missing transcendental math functions (cos, sin, acos, and more....) using 100% AVX/Neon instruct…☆35Nov 23, 2025Updated 5 months ago
- DVI video out example for prjtrellis☆17Jan 20, 2019Updated 7 years ago
- ☆63Oct 10, 2023Updated 2 years ago
- ☆15Jun 30, 2025Updated 10 months ago
- The TV80 (Verilog) synthesizable soft core of Zilog Z80 (forked from http://opencores.org/project,tv80)☆10Jan 9, 2016Updated 10 years ago