Alternatives and similar repositories for linux

Users that are interested in linux are comparing it to the libraries listed below

• michaeljclark / busybear-linux
  busybear-linux is a tiny RISC-V Linux root filesystem image that targets the VirtIO board in riscv-qemu.
  ☆98Updated last year
• damien-lemoal / buildroot
  buildroot fork
  ☆38Updated last month
• riscvarchive / riscv-newlib
  RISC-V port of newlib
  ☆102Updated 3 years ago
• freebsd-riscv / freebsd
  FreeBSD src tree
  ☆18Updated 5 years ago
• rwmjones / fedora-riscv-bootstrap
  Bootstrapping Fedora on RISC-V
  ☆29Updated 7 years ago
• openrisc / tutorials
  OpenRISC Tutorials
  ☆45Updated this week
• Galland / LEON2
  LEON2 SPARC CPU IP core LGPL by Gaisler Research
  ☆20Updated 12 years ago
• damien-lemoal / riscv64-nommu-buildroot
  ☆43Updated 4 years ago
• c-sky / csky-linux
  C-SKY Linux Port
  ☆75Updated 3 weeks ago
• openrisc / newlib
  newlib OpenRISC development
  ☆27Updated 9 months ago
• riscvarchive / riscv-platform-specs
  RISC-V Profiles and Platform Specification
  ☆116Updated 2 years ago
• westerndigitalcorporation / RISC-V-Linux
  This repository provides a Linux kernel bootable on RISC-V boards from SiFive
  ☆170Updated 5 years ago
• openrisc / or1ksim
  The OpenRISC 1000 architectural simulator
  ☆77Updated 8 months ago
• westerndigitalcorporation / swerv-ISS
  Western Digital’s Open Source RISC-V SweRV Instruction Set Simulator
  ☆202Updated 5 years ago
• jbush001 / RISC-Processor
  32-bit RISC processor
  ☆24Updated 6 years ago
• riscvarchive / riscv-poky
  Port of the Yocto Project to the RISC-V ISA
  ☆61Updated 6 years ago
• opencomputeproject / zaius-barreleye-g2
  OpenPOWER / Open Compute Server, based upon POWER9
  ☆32Updated 7 years ago
• mrisc32 / mrisc32
  MRSIC32 ISA documentation and development
  ☆91Updated 2 years ago
• openrisc / or1200
  OpenRISC 1200 implementation
  ☆176Updated 10 years ago
• openrisc / or1k-gcc
  GCC port for OpenRISC 1000
  ☆26Updated 9 months ago
• starfive-tech / JH7100_Docs
  ☆62Updated 4 years ago
• riscvarchive / riscv-binutils-gdb
  RISC-V backports for binutils-gdb. Development is done upstream at the FSF.
  ☆150Updated 3 years ago
• openpower-cores / a2o
  ☆142Updated 3 years ago
• PrincetonUniversity / piton-sw
  ☆19Updated 5 years ago
• lcbcFoo / ReonV
  ReonV is a modified version of the Leon3, a synthesisable VHDL model of a 32-bit processor originally compliant with the SPARC V8 archite…
  ☆78Updated 3 years ago
• eembc / coremark-pro
  Containing dozens of real-world and synthetic tests, CoreMark®-PRO (2015) is an industry-standard benchmark that measures the multi-proce…
  ☆213Updated last year
• vowstar / k210-linux-nommu
  K210 run linux nommu (From Damien Le Moal's patch)
  ☆159Updated 2 years ago
• riscvarchive / riscv-glibc
  RISC-V port of GNU's libc
  ☆71Updated 4 years ago
• freecores / sparc64soc
  OpenSPARC-based SoC
  ☆74Updated 11 years ago
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆78Updated this week