mit-carbon / GraphiteLinks
A parallel, distributed simulator for multicores.
☆184Updated 9 years ago
Alternatives and similar repositories for Graphite
Users that are interested in Graphite are comparing it to the libraries listed below
Sorting:
- Memory System Microbenchmarks☆63Updated 2 years ago
- doppioDB - A hardware accelerated database☆49Updated 8 years ago
- A Comprehensive Benchmark Suite for Graph Computing☆70Updated 6 years ago
- A Shared Memory Multithreaded Graph Benchmark Suite for Multicores☆36Updated 3 months ago
- an API and runtime environment for data processing with MapReduce for shared-memory multi-core & multiprocessor systems.☆96Updated last year
- Artifact Evaluation Reproduction for "Software Prefetching for Indirect Memory Accesses", CGO 2017, using CK.☆41Updated 3 years ago
- Creating beautiful gem5 simulations☆49Updated 4 years ago
- Repository for the tools and non-commercial data used for the "Accelerator wall" paper.☆51Updated 6 years ago
- A cache simulator designed to be used with memory access traces obtained from Pin (www.pintool.org)☆23Updated 7 years ago
- ESESC: A Fast Multicore Simulator☆138Updated 3 years ago
- A parallel and distributed simulator for thousand-core chips☆25Updated 7 years ago
- Blaze runtime system that support efficient accelerator integration for big data.☆24Updated 8 years ago
- HeteroSync is a benchmark suite for performing fine-grained synchronization on tightly coupled GPUs☆30Updated last year
- A fast and scalable x86-64 multicore simulator☆31Updated 4 years ago
- an approximate compiler☆39Updated 5 years ago
- SST Architectural Simulation Components and Libraries☆102Updated this week
- The Splash-3 benchmark suite☆44Updated 2 years ago
- HSCC is implemented with zsim-nvmain hybrid simulator, it has achieved the following functions: (1) Memory management simulations (such a…☆55Updated 4 years ago
- Haystack is an analytical cache model that given a program computes the number of cache misses.☆46Updated 6 years ago
- Multi2Sim source code☆132Updated 6 years ago
- A formalization of the RVWMO (RISC-V) memory model☆35Updated 3 years ago
- Simulator or Non-Uniform Cache Architectures☆10Updated 7 years ago
- ☆45Updated 8 years ago
- Slice-aware Memory Management - Exploiting NUCA Characteristic of LLC in Intel Processors☆41Updated 6 years ago
- Pointer-chasing memory benchmark (forked from Doug Pase's code).☆58Updated 11 years ago
- Caribou: Distributed Smart Storage built with FPGAs☆67Updated 7 years ago
- An unofficial mirror of the core PARSEC 3.0 benchmark suite with patches to run on x86_64 Arch Linux and generalize builds.☆119Updated 3 years ago
- Utilities to measure read access times of caches, memory, and hardware prefetches for simple and fused operations☆84Updated last year
- ☆20Updated 5 years ago
- Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …☆22Updated 4 years ago